target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled

We'll have future usage for a function where, given an offset of the
struct RISCVCPUConfig, the flag is updated to a certain val.

Change all existing callers to use edata->ext_enable_offset instead of
'edata'.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Message-ID: <20230912132423.268494-14-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2023-09-12 10:24:16 -03:00 committed by Alistair Francis
parent f57d5f8004
commit 5f2c80f1a0

View File

@ -162,18 +162,17 @@ static const struct isa_ext_data isa_edata_arr[] = {
ISA_EXT_DATA_ENTRY(xventanacondops, PRIV_VERSION_1_12_0, ext_XVentanaCondOps),
};
static bool isa_ext_is_enabled(RISCVCPU *cpu,
const struct isa_ext_data *edata)
static bool isa_ext_is_enabled(RISCVCPU *cpu, uint32_t ext_offset)
{
bool *ext_enabled = (void *)&cpu->cfg + edata->ext_enable_offset;
bool *ext_enabled = (void *)&cpu->cfg + ext_offset;
return *ext_enabled;
}
static void isa_ext_update_enabled(RISCVCPU *cpu,
const struct isa_ext_data *edata, bool en)
static void isa_ext_update_enabled(RISCVCPU *cpu, uint32_t ext_offset,
bool en)
{
bool *ext_enabled = (void *)&cpu->cfg + edata->ext_enable_offset;
bool *ext_enabled = (void *)&cpu->cfg + ext_offset;
*ext_enabled = en;
}
@ -1045,9 +1044,10 @@ static void riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU *cpu)
/* Force disable extensions if priv spec version does not match */
for (i = 0; i < ARRAY_SIZE(isa_edata_arr); i++) {
if (isa_ext_is_enabled(cpu, &isa_edata_arr[i]) &&
if (isa_ext_is_enabled(cpu, isa_edata_arr[i].ext_enable_offset) &&
(env->priv_ver < isa_edata_arr[i].min_version)) {
isa_ext_update_enabled(cpu, &isa_edata_arr[i], false);
isa_ext_update_enabled(cpu, isa_edata_arr[i].ext_enable_offset,
false);
#ifndef CONFIG_USER_ONLY
warn_report("disabling %s extension for hart 0x" TARGET_FMT_lx
" because privilege spec version does not match",
@ -2340,7 +2340,7 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char **isa_str,
int i;
for (i = 0; i < ARRAY_SIZE(isa_edata_arr); i++) {
if (isa_ext_is_enabled(cpu, &isa_edata_arr[i])) {
if (isa_ext_is_enabled(cpu, isa_edata_arr[i].ext_enable_offset)) {
new = g_strconcat(old, "_", isa_edata_arr[i].name, NULL);
g_free(old);
old = new;