Hexagon (target/hexagon) Add overrides for jumpr31 instructions
Add overrides for SL2_jumpr31 Unconditional SL2_jumpr31_t Predicated true (old value) SL2_jumpr31_f Predicated false (old value) SL2_jumpr31_tnew Predicated true (new value) SL2_jumpr31_fnew Predicated false (new value) Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230307025828.1612809-2-tsimpson@quicinc.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -986,6 +986,19 @@
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#define fGEN_TCG_S2_asl_r_r_sat(SHORTCODE) \
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gen_asl_r_r_sat(RdV, RsV, RtV)
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#define fGEN_TCG_SL2_jumpr31(SHORTCODE) \
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gen_jumpr(ctx, hex_gpr[HEX_REG_LR])
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#define fGEN_TCG_SL2_jumpr31_t(SHORTCODE) \
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gen_cond_jumpr31(ctx, TCG_COND_EQ, hex_pred[0])
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#define fGEN_TCG_SL2_jumpr31_f(SHORTCODE) \
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gen_cond_jumpr31(ctx, TCG_COND_NE, hex_pred[0])
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#define fGEN_TCG_SL2_jumpr31_tnew(SHORTCODE) \
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gen_cond_jumpr31(ctx, TCG_COND_EQ, hex_new_pred_value[0])
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#define fGEN_TCG_SL2_jumpr31_fnew(SHORTCODE) \
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gen_cond_jumpr31(ctx, TCG_COND_NE, hex_new_pred_value[0])
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/* Floating point */
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#define fGEN_TCG_F2_conv_sf2df(SHORTCODE) \
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gen_helper_conv_sf2df(RddV, cpu_env, RsV)
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -571,6 +571,13 @@ static void gen_cond_jumpr(DisasContext *ctx, TCGv dst_pc,
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gen_write_new_pc_addr(ctx, dst_pc, cond, pred);
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}
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static void gen_cond_jumpr31(DisasContext *ctx, TCGCond cond, TCGv pred)
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{
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TCGv LSB = tcg_temp_new();
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tcg_gen_andi_tl(LSB, pred, 1);
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gen_cond_jumpr(ctx, hex_gpr[HEX_REG_LR], cond, LSB);
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}
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static void gen_cond_jump(DisasContext *ctx, TCGCond cond, TCGv pred,
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int pc_off)
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{
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