target/arm: Pass CPUARMState to arm_ld[lq]_ptw
The use of ARM_CPU to recover env from cs calls object_class_dynamic_cast, which shows up on the profile. This is pointless, because all callers already have env, and the reverse operation, env_cpu, is only pointer arithmetic. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220604040607.269301-29-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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1d26125536
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@ -241,11 +241,10 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx,
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}
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/* All loads done in the course of a page table walk go through here. */
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static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure,
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static uint32_t arm_ldl_ptw(CPUARMState *env, hwaddr addr, bool is_secure,
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ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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CPUState *cs = env_cpu(env);
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MemTxAttrs attrs = {};
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MemTxResult result = MEMTX_OK;
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AddressSpace *as;
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@ -270,11 +269,10 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure,
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return 0;
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}
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static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
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static uint64_t arm_ldq_ptw(CPUARMState *env, hwaddr addr, bool is_secure,
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ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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CPUState *cs = env_cpu(env);
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MemTxAttrs attrs = {};
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MemTxResult result = MEMTX_OK;
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AddressSpace *as;
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@ -409,7 +407,6 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
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target_ulong *page_size,
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ARMMMUFaultInfo *fi)
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{
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CPUState *cs = env_cpu(env);
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int level = 1;
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uint32_t table;
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uint32_t desc;
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@ -427,7 +424,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
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fi->type = ARMFault_Translation;
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goto do_fault;
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}
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desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx),
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desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
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mmu_idx, fi);
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if (fi->type != ARMFault_None) {
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goto do_fault;
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@ -466,7 +463,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
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/* Fine pagetable. */
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table = (desc & 0xfffff000) | ((address >> 8) & 0xffc);
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}
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desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx),
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desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
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mmu_idx, fi);
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if (fi->type != ARMFault_None) {
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goto do_fault;
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@ -531,7 +528,6 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
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hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot,
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target_ulong *page_size, ARMMMUFaultInfo *fi)
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{
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CPUState *cs = env_cpu(env);
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ARMCPU *cpu = env_archcpu(env);
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int level = 1;
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uint32_t table;
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@ -553,7 +549,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
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fi->type = ARMFault_Translation;
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goto do_fault;
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}
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desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx),
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desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
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mmu_idx, fi);
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if (fi->type != ARMFault_None) {
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goto do_fault;
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@ -607,7 +603,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
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ns = extract32(desc, 3, 1);
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/* Lookup l2 entry. */
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table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc);
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desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx),
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desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
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mmu_idx, fi);
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if (fi->type != ARMFault_None) {
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goto do_fault;
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@ -973,7 +969,6 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
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ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs)
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{
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ARMCPU *cpu = env_archcpu(env);
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CPUState *cs = CPU(cpu);
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/* Read an LPAE long-descriptor translation table. */
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ARMFaultType fault_type = ARMFault_Translation;
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uint32_t level;
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@ -1196,7 +1191,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
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descaddr |= (address >> (stride * (4 - level))) & indexmask;
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descaddr &= ~7ULL;
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nstable = extract32(tableattrs, 4, 1);
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descriptor = arm_ldq_ptw(cs, descaddr, !nstable, mmu_idx, fi);
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descriptor = arm_ldq_ptw(env, descaddr, !nstable, mmu_idx, fi);
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if (fi->type != ARMFault_None) {
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goto do_fault;
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}
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