Massage PPC version of cpu_get_real_ticks a little
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6435 c046a42c-6fe2-441c-8c8c-71466251a162
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44
cpu-all.h
44
cpu-all.h
@ -996,30 +996,30 @@ void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
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#if defined(_ARCH_PPC)
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static inline uint32_t get_tbl(void)
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{
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uint32_t tbl;
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asm volatile("mftb %0" : "=r" (tbl));
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return tbl;
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}
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static inline uint32_t get_tbu(void)
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{
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uint32_t tbl;
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asm volatile("mftbu %0" : "=r" (tbl));
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return tbl;
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}
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static inline int64_t cpu_get_real_ticks(void)
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{
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uint32_t l, h, h1;
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/* NOTE: we test if wrapping has occurred */
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do {
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h = get_tbu();
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l = get_tbl();
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h1 = get_tbu();
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} while (h != h1);
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return ((int64_t)h << 32) | l;
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int64_t retval;
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#ifdef _ARCH_PPC64
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/* This reads timebase in one 64bit go and includes Cell workaround from:
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http://ozlabs.org/pipermail/linuxppc-dev/2006-October/027052.html
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*/
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__asm__ __volatile__ (
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"mftb %0\n\t"
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"cmpwi %0,0\n\t"
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"beq- $-8"
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: "=r" (retval));
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#else
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/* http://ozlabs.org/pipermail/linuxppc-dev/1999-October/003889.html */
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unsigned long junk;
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__asm__ __volatile__ (
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"mftbu %1\n\t"
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"mftb %L0\n\t"
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"mftbu %0\n\t"
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"cmpw %0,%1\n\t"
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"bne $-16"
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: "=r" (retval), "=r" (junk));
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#endif
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return retval;
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}
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#elif defined(__i386__)
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