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target-tricore: Fix wrong precedences on psw_write

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Wrong braces on the restore of the cached TCGv SV and V bit could lead to
a wrong PSW. While at this it removes unnecessary braces for the restore
of the cached TCGv AV and SAV bits.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2016-02-16 22:27:32 +01:00
parent 723733575b
commit 5dc1fbae70
1 changed files with 4 additions and 4 deletions
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8
target-tricore/helper.c
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@ -127,9 +127,9 @@ uint32_t psw_read(CPUTriCoreState *env)
void psw_write(CPUTriCoreState *env, uint32_t val)
{
env->PSW_USB_C = (val & MASK_USB_C);
env->PSW_USB_V = (val & MASK_USB_V << 1);
env->PSW_USB_SV = (val & MASK_USB_SV << 2);
env->PSW_USB_AV = ((val & MASK_USB_AV) << 3);
env->PSW_USB_SAV = ((val & MASK_USB_SAV) << 4);
env->PSW_USB_V = (val & MASK_USB_V) << 1;
env->PSW_USB_SV = (val & MASK_USB_SV) << 2;
env->PSW_USB_AV = (val & MASK_USB_AV) << 3;
env->PSW_USB_SAV = (val & MASK_USB_SAV) << 4;
env->PSW = val;
}