PPC: e500: dt: create /soc8544 node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -43,6 +43,8 @@
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#define RAM_SIZES_ALIGN (64UL << 20)
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#define MPC8544_CCSRBAR_BASE 0xE0000000
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#define MPC8544_CCSRBAR_REGSIZE 0x00001000
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#define MPC8544_CCSRBAR_SIZE 0x00100000
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#define MPC8544_MPIC_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x40000)
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#define MPC8544_SERIAL0_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4500)
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#define MPC8544_SERIAL1_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4600)
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@ -78,6 +80,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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int i;
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char compatible[] = "MPC8544DS\0MPC85xxDS";
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char model[] = "MPC8544DS";
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char soc[128];
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
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if (!filename) {
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@ -179,6 +182,20 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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}
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}
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/* XXX These should go into their respective devices' code */
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snprintf(soc, sizeof(soc), "/soc8544@%x", MPC8544_CCSRBAR_BASE);
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qemu_devtree_add_subnode(fdt, soc);
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qemu_devtree_setprop_string(fdt, soc, "device_type", "soc");
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qemu_devtree_setprop_string(fdt, soc, "compatible", "simple-bus");
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qemu_devtree_setprop_cell(fdt, soc, "#address-cells", 1);
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qemu_devtree_setprop_cell(fdt, soc, "#size-cells", 1);
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qemu_devtree_setprop_cells(fdt, soc, "ranges", 0x0, MPC8544_CCSRBAR_BASE,
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MPC8544_CCSRBAR_SIZE);
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qemu_devtree_setprop_cells(fdt, soc, "reg", MPC8544_CCSRBAR_BASE,
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MPC8544_CCSRBAR_REGSIZE);
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/* XXX should contain a reasonable value */
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qemu_devtree_setprop_cell(fdt, soc, "bus-frequency", 0);
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ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
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if (ret < 0) {
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goto out;
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@ -18,15 +18,6 @@
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};
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soc8544@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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ranges = <0x0 0xe0000000 0x100000>;
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reg = <0xe0000000 0x1000>; // CCSRBAR 1M
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bus-frequency = <0>; // Filled out by uboot.
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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