softfloat: Support float_round_to_odd more places
Previously this was only supported for roundAndPackFloat64. New support in round_canonical, round_to_int, float128_round_to_int, roundAndPackFloat32, roundAndPackInt32, roundAndPackInt64, roundAndPackUint64. This does not include any of the floatx80 routines, as we do not have users for that rounding mode there. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190215170225.15537-1-richard.henderson@linaro.org> Tested-by: David Hildenbrand <david@redhat.com> [AJB: add missing break] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
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@ -696,6 +696,7 @@ static FloatParts sf_canonicalize(FloatParts part, const FloatFmt *parm,
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static FloatParts round_canonical(FloatParts p, float_status *s,
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const FloatFmt *parm)
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{
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const uint64_t frac_lsb = parm->frac_lsb;
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const uint64_t frac_lsbm1 = parm->frac_lsbm1;
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const uint64_t round_mask = parm->round_mask;
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const uint64_t roundeven_mask = parm->roundeven_mask;
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@ -731,6 +732,10 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
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inc = p.sign ? round_mask : 0;
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overflow_norm = !p.sign;
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break;
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case float_round_to_odd:
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overflow_norm = true;
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inc = frac & frac_lsb ? 0 : round_mask;
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break;
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default:
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g_assert_not_reached();
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}
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@ -778,9 +783,14 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
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shift64RightJamming(frac, 1 - exp, &frac);
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if (frac & round_mask) {
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/* Need to recompute round-to-even. */
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if (s->float_rounding_mode == float_round_nearest_even) {
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switch (s->float_rounding_mode) {
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case float_round_nearest_even:
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inc = ((frac & roundeven_mask) != frac_lsbm1
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? frac_lsbm1 : 0);
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break;
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case float_round_to_odd:
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inc = frac & frac_lsb ? 0 : round_mask;
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break;
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}
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flags |= float_flag_inexact;
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frac += inc;
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@ -1988,6 +1998,9 @@ static FloatParts round_to_int(FloatParts a, int rmode,
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case float_round_down:
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one = a.sign;
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break;
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case float_round_to_odd:
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one = true;
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break;
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default:
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g_assert_not_reached();
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}
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@ -2021,6 +2034,9 @@ static FloatParts round_to_int(FloatParts a, int rmode,
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case float_round_down:
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inc = a.sign ? rnd_mask : 0;
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break;
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case float_round_to_odd:
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inc = a.frac & frac_lsb ? 0 : rnd_mask;
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break;
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default:
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g_assert_not_reached();
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}
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@ -3314,6 +3330,9 @@ static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status
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case float_round_down:
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roundIncrement = zSign ? 0x7f : 0;
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break;
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case float_round_to_odd:
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roundIncrement = absZ & 0x80 ? 0 : 0x7f;
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break;
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default:
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abort();
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}
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@ -3368,6 +3387,9 @@ static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
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case float_round_down:
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increment = zSign && absZ1;
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break;
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case float_round_to_odd:
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increment = !(absZ0 & 1) && absZ1;
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break;
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default:
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abort();
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}
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@ -3424,6 +3446,9 @@ static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
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case float_round_down:
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increment = zSign && absZ1;
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break;
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case float_round_to_odd:
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increment = !(absZ0 & 1) && absZ1;
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break;
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default:
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abort();
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}
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@ -3526,6 +3551,9 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
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case float_round_down:
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roundIncrement = zSign ? 0x7f : 0;
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break;
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case float_round_to_odd:
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roundIncrement = zSig & 0x80 ? 0 : 0x7f;
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break;
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default:
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abort();
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break;
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@ -3536,8 +3564,10 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
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|| ( ( zExp == 0xFD )
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&& ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
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) {
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bool overflow_to_inf = roundingMode != float_round_to_odd &&
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roundIncrement != 0;
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float_raise(float_flag_overflow | float_flag_inexact, status);
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return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
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return packFloat32(zSign, 0xFF, -!overflow_to_inf);
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}
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if ( zExp < 0 ) {
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if (status->flush_to_zero) {
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@ -3555,6 +3585,13 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
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if (isTiny && roundBits) {
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float_raise(float_flag_underflow, status);
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}
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if (roundingMode == float_round_to_odd) {
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/*
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* For round-to-odd case, the roundIncrement depends on
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* zSig which just changed.
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*/
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roundIncrement = zSig & 0x80 ? 0 : 0x7f;
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}
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}
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}
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if (roundBits) {
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@ -6987,6 +7024,15 @@ float128 float128_round_to_int(float128 a, float_status *status)
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add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
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}
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break;
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case float_round_to_odd:
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/*
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* Note that if lastBitMask == 0, the last bit is the lsb
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* of high, and roundBitsMask == -1.
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*/
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if ((lastBitMask ? z.low & lastBitMask : z.high & 1) == 0) {
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add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
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}
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break;
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default:
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abort();
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}
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@ -6998,7 +7044,7 @@ float128 float128_round_to_int(float128 a, float_status *status)
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status->float_exception_flags |= float_flag_inexact;
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aSign = extractFloat128Sign( a );
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switch (status->float_rounding_mode) {
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case float_round_nearest_even:
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case float_round_nearest_even:
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if ( ( aExp == 0x3FFE )
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&& ( extractFloat128Frac0( a )
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| extractFloat128Frac1( a ) )
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@ -7011,14 +7057,17 @@ float128 float128_round_to_int(float128 a, float_status *status)
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return packFloat128(aSign, 0x3FFF, 0, 0);
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}
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break;
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case float_round_down:
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case float_round_down:
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return
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aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
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: packFloat128( 0, 0, 0, 0 );
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case float_round_up:
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case float_round_up:
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return
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aSign ? packFloat128( 1, 0, 0, 0 )
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: packFloat128( 0, 0x3FFF, 0, 0 );
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case float_round_to_odd:
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return packFloat128(aSign, 0x3FFF, 0, 0);
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}
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return packFloat128( aSign, 0, 0, 0 );
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}
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@ -7051,6 +7100,12 @@ float128 float128_round_to_int(float128 a, float_status *status)
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z.high += roundBitsMask;
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}
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break;
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case float_round_to_odd:
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if ((z.high & lastBitMask) == 0) {
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z.high |= (a.low != 0);
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z.high += roundBitsMask;
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}
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break;
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default:
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abort();
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}
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@ -125,17 +125,42 @@ static void not_implemented(void)
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static bool blacklisted(unsigned op, int rmode)
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{
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/* odd has only been implemented for a few 128-bit ops */
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/* odd has not been implemented for any 80-bit ops */
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if (rmode == softfloat_round_odd) {
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switch (op) {
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case F128_ADD:
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case F128_SUB:
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case F128_MUL:
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case F128_DIV:
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case F128_TO_F64:
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case F128_SQRT:
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return false;
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default:
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case EXTF80_TO_UI32:
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case EXTF80_TO_UI64:
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case EXTF80_TO_I32:
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case EXTF80_TO_I64:
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case EXTF80_TO_UI32_R_MINMAG:
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case EXTF80_TO_UI64_R_MINMAG:
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case EXTF80_TO_I32_R_MINMAG:
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case EXTF80_TO_I64_R_MINMAG:
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case EXTF80_TO_F16:
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case EXTF80_TO_F32:
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case EXTF80_TO_F64:
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case EXTF80_TO_F128:
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case EXTF80_ROUNDTOINT:
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case EXTF80_ADD:
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case EXTF80_SUB:
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case EXTF80_MUL:
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case EXTF80_DIV:
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case EXTF80_REM:
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case EXTF80_SQRT:
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case EXTF80_EQ:
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case EXTF80_LE:
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case EXTF80_LT:
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case EXTF80_EQ_SIGNALING:
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case EXTF80_LE_QUIET:
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case EXTF80_LT_QUIET:
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case UI32_TO_EXTF80:
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case UI64_TO_EXTF80:
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case I32_TO_EXTF80:
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case I64_TO_EXTF80:
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case F16_TO_EXTF80:
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case F32_TO_EXTF80:
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case F64_TO_EXTF80:
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case F128_TO_EXTF80:
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return true;
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}
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}
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