nvdimm: Use configurable ACPI IO base and size
This patch makes IO base and size configurable to create NPIO AML for ACPI NFIT. Since a different architecture like AArch64 does not use port-mapped IO, a configurable IO base is required to create correct mapping of ACPI IO address and size. Signed-off-by: Kwangwoo Lee <kwangwoo.lee@sk.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200421125934.14952-3-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -900,11 +900,13 @@ void nvdimm_acpi_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev)
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}
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void nvdimm_init_acpi_state(NVDIMMState *state, MemoryRegion *io,
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struct AcpiGenericAddress dsm_io,
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FWCfgState *fw_cfg, Object *owner)
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{
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state->dsm_io = dsm_io;
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memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state,
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"nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN);
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memory_region_add_subregion(io, NVDIMM_ACPI_IO_BASE, &state->io_mr);
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"nvdimm-acpi-io", dsm_io.bit_width >> 3);
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memory_region_add_subregion(io, dsm_io.address, &state->io_mr);
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state->dsm_mem = g_array_new(false, true /* clear */, 1);
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acpi_data_push(state->dsm_mem, sizeof(NvdimmDsmIn));
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@ -933,13 +935,15 @@ void nvdimm_init_acpi_state(NVDIMMState *state, MemoryRegion *io,
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#define NVDIMM_QEMU_RSVD_UUID "648B9CF2-CDA1-4312-8AD9-49C4AF32BD62"
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static void nvdimm_build_common_dsm(Aml *dev)
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static void nvdimm_build_common_dsm(Aml *dev,
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NVDIMMState *nvdimm_state)
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{
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Aml *method, *ifctx, *function, *handle, *uuid, *dsm_mem, *elsectx2;
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Aml *elsectx, *unsupport, *unpatched, *expected_uuid, *uuid_invalid;
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Aml *pckg, *pckg_index, *pckg_buf, *field, *dsm_out_buf, *dsm_out_buf_size;
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Aml *whilectx, *offset;
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uint8_t byte_list[1];
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AmlRegionSpace rs;
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method = aml_method(NVDIMM_COMMON_DSM, 5, AML_SERIALIZED);
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uuid = aml_arg(0);
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@ -950,9 +954,16 @@ static void nvdimm_build_common_dsm(Aml *dev)
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aml_append(method, aml_store(aml_name(NVDIMM_ACPI_MEM_ADDR), dsm_mem));
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if (nvdimm_state->dsm_io.space_id == AML_AS_SYSTEM_IO) {
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rs = AML_SYSTEM_IO;
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} else {
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rs = AML_SYSTEM_MEMORY;
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}
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/* map DSM memory and IO into ACPI namespace. */
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aml_append(method, aml_operation_region(NVDIMM_DSM_IOPORT, AML_SYSTEM_IO,
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aml_int(NVDIMM_ACPI_IO_BASE), NVDIMM_ACPI_IO_LEN));
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aml_append(method, aml_operation_region(NVDIMM_DSM_IOPORT, rs,
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aml_int(nvdimm_state->dsm_io.address),
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nvdimm_state->dsm_io.bit_width >> 3));
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aml_append(method, aml_operation_region(NVDIMM_DSM_MEMORY,
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AML_SYSTEM_MEMORY, dsm_mem, sizeof(NvdimmDsmIn)));
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@ -967,7 +978,7 @@ static void nvdimm_build_common_dsm(Aml *dev)
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field = aml_field(NVDIMM_DSM_IOPORT, AML_DWORD_ACC, AML_NOLOCK,
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AML_PRESERVE);
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aml_append(field, aml_named_field(NVDIMM_DSM_NOTIFY,
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NVDIMM_ACPI_IO_LEN * BITS_PER_BYTE));
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nvdimm_state->dsm_io.bit_width));
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aml_append(method, field);
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/*
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@ -1268,7 +1279,8 @@ static void nvdimm_build_nvdimm_devices(Aml *root_dev, uint32_t ram_slots)
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}
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static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data,
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BIOSLinker *linker, GArray *dsm_dma_area,
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BIOSLinker *linker,
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NVDIMMState *nvdimm_state,
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uint32_t ram_slots)
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{
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Aml *ssdt, *sb_scope, *dev;
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@ -1296,7 +1308,7 @@ static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data,
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*/
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aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012")));
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nvdimm_build_common_dsm(dev);
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nvdimm_build_common_dsm(dev, nvdimm_state);
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/* 0 is reserved for root device. */
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nvdimm_build_device_dsm(dev, 0);
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@ -1315,7 +1327,7 @@ static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data,
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NVDIMM_ACPI_MEM_ADDR);
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bios_linker_loader_alloc(linker,
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NVDIMM_DSM_MEM_FILE, dsm_dma_area,
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NVDIMM_DSM_MEM_FILE, nvdimm_state->dsm_mem,
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sizeof(NvdimmDsmIn), false /* high memory */);
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bios_linker_loader_add_pointer(linker,
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ACPI_BUILD_TABLE_FILE, mem_addr_offset, sizeof(uint32_t),
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@ -1337,7 +1349,7 @@ void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data,
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return;
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}
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nvdimm_build_ssdt(table_offsets, table_data, linker, state->dsm_mem,
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nvdimm_build_ssdt(table_offsets, table_data, linker, state,
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ram_slots);
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device_list = nvdimm_get_device_list();
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@ -128,6 +128,12 @@ typedef struct FwCfgTPMConfig {
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static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg);
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const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio = {
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.space_id = AML_AS_SYSTEM_IO,
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.address = NVDIMM_ACPI_IO_BASE,
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.bit_width = NVDIMM_ACPI_IO_LEN << 3
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};
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static void init_common_fadt_data(MachineState *ms, Object *o,
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AcpiFadtData *data)
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{
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@ -1,6 +1,9 @@
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#ifndef HW_I386_ACPI_BUILD_H
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#define HW_I386_ACPI_BUILD_H
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#include "hw/acpi/acpi-defs.h"
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extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
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void acpi_setup(void);
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@ -61,6 +61,7 @@
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#include "migration/misc.h"
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#include "sysemu/numa.h"
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#include "hw/mem/nvdimm.h"
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#include "hw/i386/acpi-build.h"
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#define MAX_IDE_BUS 2
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@ -297,6 +298,7 @@ static void pc_init1(MachineState *machine,
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if (machine->nvdimms_state->is_enabled) {
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nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
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x86_nvdimm_acpi_dsmio,
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x86ms->fw_cfg, OBJECT(pcms));
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}
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}
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@ -54,6 +54,7 @@
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#include "qemu/error-report.h"
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#include "sysemu/numa.h"
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#include "hw/mem/nvdimm.h"
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#include "hw/i386/acpi-build.h"
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/* ICH9 AHCI has 6 ports */
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#define MAX_SATA_PORTS 6
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@ -315,6 +316,7 @@ static void pc_q35_init(MachineState *machine)
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if (machine->nvdimms_state->is_enabled) {
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nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
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x86_nvdimm_acpi_dsmio,
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x86ms->fw_cfg, OBJECT(pcms));
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}
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}
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@ -26,6 +26,7 @@
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#include "hw/mem/pc-dimm.h"
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#include "hw/acpi/bios-linker-loader.h"
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#include "qemu/uuid.h"
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#include "hw/acpi/aml-build.h"
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#define NVDIMM_DEBUG 0
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#define nvdimm_debug(fmt, ...) \
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@ -147,10 +148,12 @@ struct NVDIMMState {
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*/
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int32_t persistence;
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char *persistence_string;
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struct AcpiGenericAddress dsm_io;
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};
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typedef struct NVDIMMState NVDIMMState;
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void nvdimm_init_acpi_state(NVDIMMState *state, MemoryRegion *io,
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struct AcpiGenericAddress dsm_io,
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FWCfgState *fw_cfg, Object *owner);
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void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data,
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BIOSLinker *linker, NVDIMMState *state,
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