target/riscv: rvv-1.0: add evl parameter to vext_ldst_us()
Add supports of Vector unit-stride mask load/store instructions (vlm.v, vsm.v), which has: evl (effective vector length) = ceil(env->vl / 8). The new instructions operate the same as unmasked byte loads and stores. Add evl parameter to reuse vext_ldst_us(). Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20211210075704.23951-74-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -279,15 +279,15 @@ GEN_VEXT_ST_STRIDE(vsse64_v, int64_t, ste_d)
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/* unmasked unit-stride load and store operation*/
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static void
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vext_ldst_us(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
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vext_ldst_elem_fn *ldst_elem,
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uint32_t esz, uintptr_t ra, MMUAccessType access_type)
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vext_ldst_elem_fn *ldst_elem, uint32_t esz, uint32_t evl,
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uintptr_t ra, MMUAccessType access_type)
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{
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uint32_t i, k;
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uint32_t nf = vext_nf(desc);
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uint32_t max_elems = vext_max_elems(desc, esz);
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/* load bytes from guest memory */
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for (i = env->vstart; i < env->vl; i++, env->vstart++) {
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for (i = env->vstart; i < evl; i++, env->vstart++) {
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k = 0;
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while (k < nf) {
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target_ulong addr = base + ((i * nf + k) << esz);
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@ -316,7 +316,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_us(vd, base, env, desc, LOAD_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_LOAD); \
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ctzl(sizeof(ETYPE)), env->vl, GETPC(), MMU_DATA_LOAD); \
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}
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GEN_VEXT_LD_US(vle8_v, int8_t, lde_b)
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@ -324,20 +324,20 @@ GEN_VEXT_LD_US(vle16_v, int16_t, lde_h)
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GEN_VEXT_LD_US(vle32_v, int32_t, lde_w)
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GEN_VEXT_LD_US(vle64_v, int64_t, lde_d)
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#define GEN_VEXT_ST_US(NAME, ETYPE, STORE_FN) \
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void HELPER(NAME##_mask)(void *vd, void *v0, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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uint32_t stride = vext_nf(desc) << ctzl(sizeof(ETYPE)); \
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vext_ldst_stride(vd, v0, base, stride, env, desc, false, STORE_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
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} \
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\
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void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_us(vd, base, env, desc, STORE_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
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#define GEN_VEXT_ST_US(NAME, ETYPE, STORE_FN) \
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void HELPER(NAME##_mask)(void *vd, void *v0, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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uint32_t stride = vext_nf(desc) << ctzl(sizeof(ETYPE)); \
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vext_ldst_stride(vd, v0, base, stride, env, desc, false, STORE_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
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} \
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\
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void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_us(vd, base, env, desc, STORE_FN, \
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ctzl(sizeof(ETYPE)), env->vl, GETPC(), MMU_DATA_STORE); \
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}
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GEN_VEXT_ST_US(vse8_v, int8_t, ste_b)
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