mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

s390x/gdb: support reading/writing of control registers

Browse Source 
Let's support reading and writing of control registers for kvm and tcg.

We have to take care of flushing the tlb (tcg) and pushing the changed
registers into kvm.

Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
This commit is contained in:
David Hildenbrand 2015-06-23 11:00:09 +02:00 committed by Cornelia Huck
parent c0194a00b0
commit 5b9f6345a6
3 changed files with 66 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
configure vendored
View File

@ -5392,7 +5392,7 @@ case "$target_name" in
echo "TARGET_ABI32=y" >> $config_target_mak echo "TARGET_ABI32=y" >> $config_target_mak
;; ;;
s390x) s390x)
gdb_xml_files="s390x-core64.xml s390-acr.xml s390-fpr.xml s390-vx.xml" gdb_xml_files="s390x-core64.xml s390-acr.xml s390-fpr.xml s390-vx.xml s390-cr.xml"
;; ;;
tricore) tricore)
;; ;;

26
gdb-xml/s390-cr.xml Normal file
View File

@ -0,0 +1,26 @@
<?xml version="1.0"?>
<!-- Copyright 2015 IBM Corp.
This work is licensed under the terms of the GNU GPL, version 2 or
(at your option) any later version. See the COPYING file in the
top-level directory. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.cr">
<reg name="cr0" bitsize="64" type="uint64" group="control"/>
<reg name="cr1" bitsize="64" type="uint64" group="control"/>
<reg name="cr2" bitsize="64" type="uint64" group="control"/>
<reg name="cr3" bitsize="64" type="uint64" group="control"/>
<reg name="cr4" bitsize="64" type="uint64" group="control"/>
<reg name="cr5" bitsize="64" type="uint64" group="control"/>
<reg name="cr6" bitsize="64" type="uint64" group="control"/>
<reg name="cr7" bitsize="64" type="uint64" group="control"/>
<reg name="cr8" bitsize="64" type="uint64" group="control"/>
<reg name="cr9" bitsize="64" type="uint64" group="control"/>
<reg name="cr10" bitsize="64" type="uint64" group="control"/>
<reg name="cr11" bitsize="64" type="uint64" group="control"/>
<reg name="cr12" bitsize="64" type="uint64" group="control"/>
<reg name="cr13" bitsize="64" type="uint64" group="control"/>
<reg name="cr14" bitsize="64" type="uint64" group="control"/>
<reg name="cr15" bitsize="64" type="uint64" group="control"/>
</feature>

39
target-s390x/gdbstub.c
View File

@ -174,6 +174,39 @@ static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
} }
} }
/* the values represent the positions in s390-cr.xml */
#define S390_C0_REGNUM 0
#define S390_C15_REGNUM 15
/* total number of registers in s390-cr.xml */
#define S390_NUM_C_REGS 16
#ifndef CONFIG_USER_ONLY
static int cpu_read_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
switch (n) {
case S390_C0_REGNUM ... S390_C15_REGNUM:
return gdb_get_regl(mem_buf, env->cregs[n]);
default:
return 0;
}
}
static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
switch (n) {
case S390_C0_REGNUM ... S390_C15_REGNUM:
env->cregs[n] = ldtul_p(mem_buf);
if (tcg_enabled()) {
tlb_flush(ENV_GET_CPU(env), 1);
}
cpu_synchronize_post_init(ENV_GET_CPU(env));
return 8;
default:
return 0;
}
}
#endif
void s390_cpu_gdb_init(CPUState *cs) void s390_cpu_gdb_init(CPUState *cs)
{ {
gdb_register_coprocessor(cs, cpu_read_ac_reg, gdb_register_coprocessor(cs, cpu_read_ac_reg,
@ -187,4 +220,10 @@ void s390_cpu_gdb_init(CPUState *cs)
gdb_register_coprocessor(cs, cpu_read_vreg, gdb_register_coprocessor(cs, cpu_read_vreg,
cpu_write_vreg, cpu_write_vreg,
S390_NUM_VREGS, "s390-vx.xml", 0); S390_NUM_VREGS, "s390-vx.xml", 0);
#ifndef CONFIG_USER_ONLY
gdb_register_coprocessor(cs, cpu_read_c_reg,
cpu_write_c_reg,
S390_NUM_C_REGS, "s390-cr.xml", 0);
#endif
} }