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tests/qtest/bios-tables-test.c: Enable basic testing for RISC-V

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Add basic ACPI table test case for RISC-V.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20240716144306.2432257-9-sunilvl@ventanamicro.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Sunil V L 2024-07-16 20:13:05 +05:30 committed by Michael S. Tsirkin
parent cc3ba24225
commit 5b966e548f
1 changed files with 26 additions and 0 deletions
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26
tests/qtest/bios-tables-test.c
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@ -1963,6 +1963,28 @@ static void test_acpi_microvm_acpi_erst(void)
}
#endif /* CONFIG_POSIX */
static void test_acpi_riscv64_virt_tcg(void)
{
test_data data = {
.machine = "virt",
.arch = "riscv64",
.tcg_only = true,
.uefi_fl1 = "pc-bios/edk2-riscv-code.fd",
.uefi_fl2 = "pc-bios/edk2-riscv-vars.fd",
.cd = "tests/data/uefi-boot-images/bios-tables-test.riscv64.iso.qcow2",
.ram_start = 0x80000000ULL,
.scan_len = 128ULL * 1024 * 1024,
};
/*
* RHCT will have ISA string encoded. To reduce the effort
* of updating expected AML file for any new default ISA extension,
* use the profile rva22s64.
*/
test_acpi_one("-cpu rva22s64 ", &data);
free_test_data(&data);
}
static void test_acpi_aarch64_virt_tcg(void)
{
test_data data = {
@ -2441,6 +2463,10 @@ int main(int argc, char *argv[])
qtest_add_func("acpi/virt/viot", test_acpi_aarch64_virt_viot);
}
}
} else if (strcmp(arch, "riscv64") == 0) {
if (has_tcg && qtest_has_device("virtio-blk-pci")) {
qtest_add_func("acpi/virt", test_acpi_riscv64_virt_tcg);
}
}
ret = g_test_run();
boot_sector_cleanup(disk);