Code provision for hypervisor timers resources,
as described in PowerPC 2.04 specification. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3264 c046a42c-6fe2-441c-8c8c-71466251a162
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107
hw/ppc.c
107
hw/ppc.c
@ -412,6 +412,13 @@ struct ppc_tb_t {
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/* Decrementer management */
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uint64_t decr_next; /* Tick for next decr interrupt */
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struct QEMUTimer *decr_timer;
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#if defined(TARGET_PPC64H)
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/* Hypervisor decrementer management */
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uint64_t hdecr_next; /* Tick for next hdecr interrupt */
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struct QEMUTimer *hdecr_timer;
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uint64_t purr_load;
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uint64_t purr_start;
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#endif
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void *opaque;
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};
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@ -489,7 +496,7 @@ void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
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((uint64_t)cpu_ppc_load_tbu(env) << 32) | value);
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}
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uint32_t cpu_ppc_load_decr (CPUState *env)
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static inline uint32_t _cpu_ppc_load_decr (CPUState *env, uint64_t *next)
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{
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ppc_tb_t *tb_env = env->tb_env;
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uint32_t decr;
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@ -509,6 +516,32 @@ uint32_t cpu_ppc_load_decr (CPUState *env)
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return decr;
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}
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uint32_t cpu_ppc_load_decr (CPUState *env)
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{
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ppc_tb_t *tb_env = env->tb_env;
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return _cpu_ppc_load_decr(env, &tb_env->decr_next);
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}
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#if defined(TARGET_PPC64H)
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uint32_t cpu_ppc_load_hdecr (CPUState *env)
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{
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ppc_tb_t *tb_env = env->tb_env;
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return _cpu_ppc_load_decr(env, &tb_env->hdecr_next);
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}
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uint64_t cpu_ppc_load_purr (CPUState *env)
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{
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t diff;
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diff = qemu_get_clock(vm_clock) - tb_env->purr_start;
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return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, ticks_per_sec);
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}
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#endif /* defined(TARGET_PPC64H) */
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/* When decrementer expires,
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* all we need to do is generate or queue a CPU exception
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*/
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@ -523,8 +556,22 @@ static inline void cpu_ppc_decr_excp (CPUState *env)
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ppc_set_irq(env, PPC_INTERRUPT_DECR, 1);
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}
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static void _cpu_ppc_store_decr (CPUState *env, uint32_t decr,
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uint32_t value, int is_excp)
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static inline void cpu_ppc_hdecr_excp (CPUState *env)
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{
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/* Raise it */
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#ifdef PPC_DEBUG_TB
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if (loglevel != 0) {
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fprintf(logfile, "raise decrementer exception\n");
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}
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#endif
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ppc_set_irq(env, PPC_INTERRUPT_HDECR, 1);
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}
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static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp,
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struct QEMUTimer *timer,
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void (*raise_excp)(CPUState *),
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uint32_t decr, uint32_t value,
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int is_excp)
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{
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ppc_tb_t *tb_env = env->tb_env;
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uint64_t now, next;
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@ -537,17 +584,27 @@ static void _cpu_ppc_store_decr (CPUState *env, uint32_t decr,
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now = qemu_get_clock(vm_clock);
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next = now + muldiv64(value, ticks_per_sec, tb_env->tb_freq);
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if (is_excp)
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next += tb_env->decr_next - now;
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next += *nextp - now;
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if (next == now)
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next++;
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tb_env->decr_next = next;
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*nextp = next;
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/* Adjust timer */
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qemu_mod_timer(tb_env->decr_timer, next);
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qemu_mod_timer(timer, next);
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/* If we set a negative value and the decrementer was positive,
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* raise an exception.
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*/
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if ((value & 0x80000000) && !(decr & 0x80000000))
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cpu_ppc_decr_excp(env);
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(*raise_excp)(env);
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}
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static inline void _cpu_ppc_store_decr (CPUState *env, uint32_t decr,
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uint32_t value, int is_excp)
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{
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ppc_tb_t *tb_env = env->tb_env;
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__cpu_ppc_store_decr(env, &tb_env->decr_next, tb_env->decr_timer,
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&cpu_ppc_decr_excp, decr, value, is_excp);
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}
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void cpu_ppc_store_decr (CPUState *env, uint32_t value)
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@ -560,6 +617,35 @@ static void cpu_ppc_decr_cb (void *opaque)
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_cpu_ppc_store_decr(opaque, 0x00000000, 0xFFFFFFFF, 1);
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}
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#if defined(TARGET_PPC64H)
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static inline void _cpu_ppc_store_hdecr (CPUState *env, uint32_t hdecr,
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uint32_t value, int is_excp)
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{
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ppc_tb_t *tb_env = env->tb_env;
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__cpu_ppc_store_decr(env, &tb_env->hdecr_next, tb_env->hdecr_timer,
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&cpu_ppc_hdecr_excp, hdecr, value, is_excp);
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}
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void cpu_ppc_store_hdecr (CPUState *env, uint32_t value)
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{
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_cpu_ppc_store_hdecr(env, cpu_ppc_load_hdecr(env), value, 0);
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}
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static void cpu_ppc_hdecr_cb (void *opaque)
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{
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_cpu_ppc_store_hdecr(opaque, 0x00000000, 0xFFFFFFFF, 1);
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}
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void cpu_ppc_store_purr (CPUState *env, uint64_t value)
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{
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ppc_tb_t *tb_env = env->tb_env;
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tb_env->purr_load = value;
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tb_env->purr_start = qemu_get_clock(vm_clock);
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}
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#endif /* defined(TARGET_PPC64H) */
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static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq)
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{
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CPUState *env = opaque;
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@ -571,6 +657,10 @@ static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq)
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* it's not ready to handle it...
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*/
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_cpu_ppc_store_decr(env, 0xFFFFFFFF, 0xFFFFFFFF, 0);
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#if defined(TARGET_PPC64H)
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_cpu_ppc_store_hdecr(env, 0xFFFFFFFF, 0xFFFFFFFF, 0);
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cpu_ppc_store_purr(env, 0x0000000000000000ULL);
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#endif /* defined(TARGET_PPC64H) */
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}
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/* Set up (once) timebase frequency (in Hz) */
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@ -584,6 +674,9 @@ clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq)
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env->tb_env = tb_env;
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/* Create new timer */
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tb_env->decr_timer = qemu_new_timer(vm_clock, &cpu_ppc_decr_cb, env);
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#if defined(TARGET_PPC64H)
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tb_env->hdecr_timer = qemu_new_timer(vm_clock, &cpu_ppc_hdecr_cb, env);
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#endif /* defined(TARGET_PPC64H) */
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cpu_ppc_set_tb_clk(env, freq);
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return &cpu_ppc_set_tb_clk;
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@ -627,6 +627,12 @@ void cpu_ppc_store_tbu (CPUPPCState *env, uint32_t value);
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void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value);
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uint32_t cpu_ppc_load_decr (CPUPPCState *env);
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void cpu_ppc_store_decr (CPUPPCState *env, uint32_t value);
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#if defined(TARGET_PPC64H)
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uint32_t cpu_ppc_load_hdecr (CPUPPCState *env);
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void cpu_ppc_store_hdecr (CPUPPCState *env, uint32_t value);
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uint64_t cpu_ppc_load_purr (CPUPPCState *env);
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void cpu_ppc_store_purr (CPUPPCState *env, uint64_t value);
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#endif
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uint32_t cpu_ppc601_load_rtcl (CPUPPCState *env);
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uint32_t cpu_ppc601_load_rtcu (CPUPPCState *env);
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#if !defined(CONFIG_USER_ONLY)
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