Fix PowerPC targets compilation on 32 bits hosts:
now that the SPE extension is available for all targets, we always need to have some 64 bits temporary registers. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3647 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -520,11 +520,11 @@ struct CPUPPCState {
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/* First are the most commonly used resources
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* during translated code execution
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*/
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#if TARGET_GPR_BITS > HOST_LONG_BITS
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#if (HOST_LONG_BITS == 32)
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/* temporary fixed-point registers
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* used to emulate 64 bits target on 32 bits hosts
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* used to emulate 64 bits registers on 32 bits hosts
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*/
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ppc_gpr_t t0, t1, t2;
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uint64_t t0, t1, t2;
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#endif
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ppc_avr_t avr0, avr1, avr2;
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@ -42,8 +42,8 @@ register unsigned long T0 asm(AREG1);
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register unsigned long T1 asm(AREG2);
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register unsigned long T2 asm(AREG3);
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#endif
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/* We may, sometime, need 64 bits registers on 32 bits target */
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#if TARGET_GPR_BITS > HOST_LONG_BITS
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/* We may, sometime, need 64 bits registers on 32 bits targets */
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#if (HOST_LONG_BITS == 32)
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/* no registers can be used */
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#define T0_64 (env->t0)
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#define T1_64 (env->t1)
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