target-sparc: Make cpu_dst local to OP=2 insns
And initialize it such that it (may) write directly to rd. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -48,7 +48,7 @@ static TCGv cpu_y;
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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static TCGv cpu_tbr;
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static TCGv cpu_tbr;
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#endif
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#endif
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static TCGv cpu_cond, cpu_dst;
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static TCGv cpu_cond;
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#ifdef TARGET_SPARC64
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#ifdef TARGET_SPARC64
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static TCGv_i32 cpu_xcc, cpu_asi, cpu_fprs;
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static TCGv_i32 cpu_xcc, cpu_asi, cpu_fprs;
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static TCGv cpu_gsr;
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static TCGv cpu_gsr;
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@ -2511,7 +2511,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
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}
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}
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opc = GET_FIELD(insn, 0, 1);
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opc = GET_FIELD(insn, 0, 1);
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rd = GET_FIELD(insn, 2, 6);
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rd = GET_FIELD(insn, 2, 6);
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switch (opc) {
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switch (opc) {
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@ -2620,6 +2619,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
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case 2: /* FPU & Logical Operations */
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case 2: /* FPU & Logical Operations */
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{
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{
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unsigned int xop = GET_FIELD(insn, 7, 12);
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unsigned int xop = GET_FIELD(insn, 7, 12);
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TCGv cpu_dst = gen_dest_gpr(dc, rd);
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if (xop == 0x3a) { /* generate trap */
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if (xop == 0x3a) { /* generate trap */
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int cond = GET_FIELD(insn, 3, 6);
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int cond = GET_FIELD(insn, 3, 6);
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TCGv_i32 trap;
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TCGv_i32 trap;
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@ -5258,12 +5259,10 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
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insn = cpu_ldl_code(env, dc->pc);
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insn = cpu_ldl_code(env, dc->pc);
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cpu_tmp0 = tcg_temp_new();
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cpu_tmp0 = tcg_temp_new();
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cpu_dst = tcg_temp_new();
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disas_sparc_insn(dc, insn);
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disas_sparc_insn(dc, insn);
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num_insns++;
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num_insns++;
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tcg_temp_free(cpu_dst);
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tcg_temp_free(cpu_tmp0);
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tcg_temp_free(cpu_tmp0);
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if (dc->is_br)
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if (dc->is_br)
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