target/hppa: Adjust hppa_cpu_dump_state for hppa64
Dump all 64 bits for pa2.0 and low 32 bits for pa1.x. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -111,18 +111,26 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg psw)
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void hppa_cpu_dump_state(CPUState *cs, FILE *f, int flags)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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CPUHPPAState *env = &cpu->env;
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CPUHPPAState *env = cpu_env(cs);
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target_ureg psw = cpu_hppa_get_psw(env);
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target_ureg psw_cb;
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char psw_c[20];
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int i;
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int i, w;
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uint64_t m;
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if (hppa_is_pa20(env)) {
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w = 16;
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m = UINT64_MAX;
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} else {
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w = 8;
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m = UINT32_MAX;
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}
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qemu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx
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" IIR " TREG_FMT_lx "\n",
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" IIR %0*" PRIx64 "\n",
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hppa_form_gva_psw(psw, env->iasq_f, env->iaoq_f),
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hppa_form_gva_psw(psw, env->iasq_b, env->iaoq_b),
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env->cr[CR_IIR]);
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w, m & env->cr[CR_IIR]);
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psw_c[0] = (psw & PSW_W ? 'W' : '-');
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psw_c[1] = (psw & PSW_E ? 'E' : '-');
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@ -143,13 +151,15 @@ void hppa_cpu_dump_state(CPUState *cs, FILE *f, int flags)
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psw_c[16] = (psw & PSW_D ? 'D' : '-');
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psw_c[17] = (psw & PSW_I ? 'I' : '-');
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psw_c[18] = '\0';
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psw_cb = ((env->psw_cb >> 4) & 0x01111111) | (env->psw_cb_msb << 28);
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psw_cb = ((env->psw_cb >> 4) & ((target_ureg)-1 / 0xf))
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| (env->psw_cb_msb << (TARGET_REGISTER_BITS - 4));
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qemu_fprintf(f, "PSW " TREG_FMT_lx " CB " TREG_FMT_lx " %s\n",
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psw, psw_cb, psw_c);
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qemu_fprintf(f, "PSW %0*" PRIx64 " CB %0*" PRIx64 " %s\n",
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w, m & psw, w, m & psw_cb, psw_c);
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for (i = 0; i < 32; i++) {
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qemu_fprintf(f, "GR%02d " TREG_FMT_lx "%c", i, env->gr[i],
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qemu_fprintf(f, "GR%02d %0*" PRIx64 "%c",
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i, w, m & env->gr[i],
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(i & 3) == 3 ? '\n' : ' ');
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}
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#ifndef CONFIG_USER_ONLY
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