target-microblaze: Introduce a use-msr-instr property
Introduce a use-msr-instr property making msr instructions optional. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@ -157,7 +157,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
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| PVR2_D_LMB_MASK \
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| PVR2_I_OPB_MASK \
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| PVR2_I_LMB_MASK \
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| PVR2_USE_MSR_INSTR \
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| PVR2_USE_PCMP_INSTR \
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| PVR2_FPU_EXC_MASK \
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| 0;
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@ -188,7 +187,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
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(cpu->cfg.use_hw_mul ? PVR2_USE_HW_MUL_MASK : 0) |
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(cpu->cfg.use_hw_mul > 1 ? PVR2_USE_MUL64_MASK : 0) |
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(cpu->cfg.use_barrel ? PVR2_USE_BARREL_MASK : 0) |
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(cpu->cfg.use_div ? PVR2_USE_DIV_MASK : 0);
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(cpu->cfg.use_div ? PVR2_USE_DIV_MASK : 0) |
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(cpu->cfg.use_msr_instr ? PVR2_USE_MSR_INSTR : 0);
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env->pvr.regs[5] |= cpu->cfg.dcache_writeback ?
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PVR5_DCACHE_WRITEBACK_MASK : 0;
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@ -241,6 +241,7 @@ static Property mb_properties[] = {
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DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
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DEFINE_PROP_BOOL("use-barrel", MicroBlazeCPU, cfg.use_barrel, true),
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DEFINE_PROP_BOOL("use-div", MicroBlazeCPU, cfg.use_div, true),
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DEFINE_PROP_BOOL("use-msr-instr", MicroBlazeCPU, cfg.use_msr_instr, true),
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DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
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DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
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false),
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@ -301,6 +301,7 @@ struct MicroBlazeCPU {
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uint8_t use_hw_mul;
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bool use_barrel;
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bool use_div;
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bool use_msr_instr;
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bool use_mmu;
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bool dcache_writeback;
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bool endi;
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@ -443,7 +443,7 @@ static void dec_msr(DisasContext *dc)
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LOG_DIS("msr%s r%d imm=%x\n", clr ? "clr" : "set",
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dc->rd, dc->imm);
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if (!(dc->cpu->env.pvr.regs[2] & PVR2_USE_MSR_INSTR)) {
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if (!dc->cpu->cfg.use_msr_instr) {
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/* nop??? */
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return;
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}
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