hw/arm/stellaris: Implement watchdog timer
Implement the watchdog timer for the stellaris boards. This device is a close variant of the CMSDK APB watchdog device, so we can model it by subclassing that device and tweaking the behaviour of some of its registers. Signed-off-by: Michel Heily <michelheily@gmail.com> Reviewed-by: Peter Maydell <petser.maydell@linaro.org> [PMM: rewrote commit message, fixed a few checkpatch nits, added comment giving the URL of the spec for the Stellaris variant of the watchdog device] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -22,6 +22,7 @@
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#include "sysemu/sysemu.h"
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#include "hw/arm/armv7m.h"
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#include "hw/char/pl011.h"
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#include "hw/watchdog/cmsdk-apb-watchdog.h"
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#include "hw/misc/unimp.h"
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#include "cpu.h"
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@ -1243,7 +1244,7 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board)
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* Stellaris LM3S6965 Microcontroller Data Sheet (rev I)
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* http://www.ti.com/lit/ds/symlink/lm3s6965.pdf
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*
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* 40000000 wdtimer (unimplemented)
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* 40000000 wdtimer
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* 40002000 i2c (unimplemented)
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* 40004000 GPIO
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* 40005000 GPIO
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@ -1338,6 +1339,24 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board)
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stellaris_sys_init(0x400fe000, qdev_get_gpio_in(nvic, 28),
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board, nd_table[0].macaddr.a);
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if (board->dc1 & (1 << 3)) { /* watchdog present */
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dev = qdev_create(NULL, TYPE_LUMINARY_WATCHDOG);
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/* system_clock_scale is valid now */
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uint32_t mainclk = NANOSECONDS_PER_SECOND / system_clock_scale;
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qdev_prop_set_uint32(dev, "wdogclk-frq", mainclk);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev),
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0,
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0x40000000u);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev),
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0,
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qdev_get_gpio_in(nvic, 18));
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}
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for (i = 0; i < 7; i++) {
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if (board->dc4 & (1 << i)) {
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gpio_dev[i] = sysbus_create_simple("pl061_luminary", gpio_addr[i],
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@ -1431,7 +1450,6 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board)
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/* Add dummy regions for the devices we don't implement yet,
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* so guest accesses don't cause unlogged crashes.
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*/
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create_unimplemented_device("wdtimer", 0x40000000, 0x1000);
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create_unimplemented_device("i2c-0", 0x40002000, 0x1000);
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create_unimplemented_device("i2c-2", 0x40021000, 0x1000);
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create_unimplemented_device("PWM", 0x40028000, 0x1000);
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@ -14,6 +14,10 @@
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* System Design Kit (CMSDK) and documented in the Cortex-M System
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* Design Kit Technical Reference Manual (ARM DDI0479C):
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* https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
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*
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* We also support the variant of this device found in the TI
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* Stellaris/Luminary boards and documented in:
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* http://www.ti.com/lit/ds/symlink/lm3s6965.pdf
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*/
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#include "qemu/osdep.h"
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@ -37,6 +41,7 @@ REG32(WDOGINTCLR, 0xc)
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REG32(WDOGRIS, 0x10)
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FIELD(WDOGRIS, INT, 0, 1)
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REG32(WDOGMIS, 0x14)
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REG32(WDOGTEST, 0x418) /* only in Stellaris/Luminary version of the device */
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REG32(WDOGLOCK, 0xc00)
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#define WDOG_UNLOCK_VALUE 0x1ACCE551
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REG32(WDOGITCR, 0xf00)
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@ -61,12 +66,18 @@ REG32(CID2, 0xff8)
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REG32(CID3, 0xffc)
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/* PID/CID values */
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static const int watchdog_id[] = {
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static const uint32_t cmsdk_apb_watchdog_id[] = {
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0x04, 0x00, 0x00, 0x00, /* PID4..PID7 */
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0x24, 0xb8, 0x1b, 0x00, /* PID0..PID3 */
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0x0d, 0xf0, 0x05, 0xb1, /* CID0..CID3 */
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};
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static const uint32_t luminary_watchdog_id[] = {
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0x00, 0x00, 0x00, 0x00, /* PID4..PID7 */
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0x05, 0x18, 0x18, 0x01, /* PID0..PID3 */
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0x0d, 0xf0, 0x05, 0xb1, /* CID0..CID3 */
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};
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static bool cmsdk_apb_watchdog_intstatus(CMSDKAPBWatchdog *s)
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{
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/* Return masked interrupt status */
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@ -85,6 +96,10 @@ static void cmsdk_apb_watchdog_update(CMSDKAPBWatchdog *s)
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bool wdogres;
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if (s->itcr) {
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/*
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* Not checking that !s->is_luminary since s->itcr can't be written
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* when s->is_luminary in the first place.
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*/
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wdogint = s->itop & R_WDOGITOP_WDOGINT_MASK;
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wdogres = s->itop & R_WDOGITOP_WDOGRES_MASK;
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} else {
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@ -124,19 +139,34 @@ static uint64_t cmsdk_apb_watchdog_read(void *opaque, hwaddr offset,
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r = s->lock;
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break;
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case A_WDOGITCR:
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if (s->is_luminary) {
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goto bad_offset;
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}
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r = s->itcr;
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break;
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case A_PID4 ... A_CID3:
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r = watchdog_id[(offset - A_PID4) / 4];
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r = s->id[(offset - A_PID4) / 4];
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break;
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case A_WDOGINTCLR:
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case A_WDOGITOP:
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if (s->is_luminary) {
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goto bad_offset;
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}
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qemu_log_mask(LOG_GUEST_ERROR,
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"CMSDK APB watchdog read: read of WO offset %x\n",
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(int)offset);
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r = 0;
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break;
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case A_WDOGTEST:
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if (!s->is_luminary) {
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goto bad_offset;
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}
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qemu_log_mask(LOG_UNIMP,
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"Luminary watchdog read: stall not implemented\n");
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r = 0;
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break;
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default:
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bad_offset:
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qemu_log_mask(LOG_GUEST_ERROR,
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"CMSDK APB watchdog read: bad offset %x\n", (int)offset);
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r = 0;
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@ -170,6 +200,14 @@ static void cmsdk_apb_watchdog_write(void *opaque, hwaddr offset,
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ptimer_run(s->timer, 0);
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break;
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case A_WDOGCONTROL:
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if (s->is_luminary && 0 != (R_WDOGCONTROL_INTEN_MASK & s->control)) {
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/*
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* The Luminary version of this device ignores writes to
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* this register after the guest has enabled interrupts
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* (so they can only be disabled again via reset).
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*/
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break;
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}
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s->control = value & R_WDOGCONTROL_VALID_MASK;
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cmsdk_apb_watchdog_update(s);
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break;
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@ -182,10 +220,16 @@ static void cmsdk_apb_watchdog_write(void *opaque, hwaddr offset,
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s->lock = (value != WDOG_UNLOCK_VALUE);
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break;
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case A_WDOGITCR:
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if (s->is_luminary) {
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goto bad_offset;
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}
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s->itcr = value & R_WDOGITCR_VALID_MASK;
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cmsdk_apb_watchdog_update(s);
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break;
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case A_WDOGITOP:
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if (s->is_luminary) {
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goto bad_offset;
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}
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s->itop = value & R_WDOGITOP_VALID_MASK;
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cmsdk_apb_watchdog_update(s);
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break;
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@ -197,7 +241,15 @@ static void cmsdk_apb_watchdog_write(void *opaque, hwaddr offset,
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"CMSDK APB watchdog write: write to RO offset 0x%x\n",
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(int)offset);
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break;
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case A_WDOGTEST:
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if (!s->is_luminary) {
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goto bad_offset;
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}
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qemu_log_mask(LOG_UNIMP,
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"Luminary watchdog write: stall not implemented\n");
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break;
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default:
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bad_offset:
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qemu_log_mask(LOG_GUEST_ERROR,
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"CMSDK APB watchdog write: bad offset 0x%x\n",
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(int)offset);
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@ -256,6 +308,9 @@ static void cmsdk_apb_watchdog_init(Object *obj)
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s, "cmsdk-apb-watchdog", 0x1000);
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sysbus_init_mmio(sbd, &s->iomem);
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sysbus_init_irq(sbd, &s->wdogint);
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s->is_luminary = false;
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s->id = cmsdk_apb_watchdog_id;
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}
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static void cmsdk_apb_watchdog_realize(DeviceState *dev, Error **errp)
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@ -318,9 +373,24 @@ static const TypeInfo cmsdk_apb_watchdog_info = {
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.class_init = cmsdk_apb_watchdog_class_init,
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};
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static void luminary_watchdog_init(Object *obj)
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{
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CMSDKAPBWatchdog *s = CMSDK_APB_WATCHDOG(obj);
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s->is_luminary = true;
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s->id = luminary_watchdog_id;
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}
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static const TypeInfo luminary_watchdog_info = {
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.name = TYPE_LUMINARY_WATCHDOG,
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.parent = TYPE_CMSDK_APB_WATCHDOG,
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.instance_init = luminary_watchdog_init
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};
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static void cmsdk_apb_watchdog_register_types(void)
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{
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type_register_static(&cmsdk_apb_watchdog_info);
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type_register_static(&luminary_watchdog_info);
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}
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type_init(cmsdk_apb_watchdog_register_types);
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#define CMSDK_APB_WATCHDOG(obj) OBJECT_CHECK(CMSDKAPBWatchdog, (obj), \
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TYPE_CMSDK_APB_WATCHDOG)
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/*
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* This shares the same struct (and cast macro) as the base
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* cmsdk-apb-watchdog device.
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*/
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#define TYPE_LUMINARY_WATCHDOG "luminary-watchdog"
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typedef struct CMSDKAPBWatchdog {
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/*< private >*/
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SysBusDevice parent_obj;
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@ -46,6 +52,7 @@ typedef struct CMSDKAPBWatchdog {
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MemoryRegion iomem;
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qemu_irq wdogint;
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uint32_t wdogclk_frq;
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bool is_luminary;
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struct ptimer_state *timer;
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uint32_t control;
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@ -54,6 +61,7 @@ typedef struct CMSDKAPBWatchdog {
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uint32_t itcr;
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uint32_t itop;
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uint32_t resetstatus;
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const uint32_t *id;
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} CMSDKAPBWatchdog;
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#endif
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