libqos/ahci: ATAPI support
Add pathways to tolerate ATAPI commands. Notably, unlike ATA, each SCSI command's layout is a little different, so support will have to be patched in for each command as we want to test them in e.g. ahci_command_set_sizes and ahci_command_set_offset. For now, I'm adding support for 0x28, READ (10). [Maintainer edit: replaced type-punning with stl_be_p(). --js] Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1452282920-21550-3-git-send-email-jsnow@redhat.com
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John Snow
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248de4a899
commit
54d268b26a
@ -74,7 +74,11 @@ AHCICommandProp ahci_command_properties[] = {
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.lba48 = true, .write = true, .ncq = true },
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{ .cmd = CMD_READ_MAX, .lba28 = true },
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{ .cmd = CMD_READ_MAX_EXT, .lba48 = true },
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{ .cmd = CMD_FLUSH_CACHE, .data = false }
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{ .cmd = CMD_FLUSH_CACHE, .data = false },
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{ .cmd = CMD_PACKET, .data = true, .size = 16,
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.atapi = true, },
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{ .cmd = CMD_PACKET_ID, .data = true, .pio = true,
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.size = 512, .read = true }
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};
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struct AHCICommand {
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@ -90,7 +94,7 @@ struct AHCICommand {
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/* Data to be transferred to the guest */
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AHCICommandHeader header;
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RegH2DFIS fis;
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void *atapi_cmd;
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unsigned char *atapi_cmd;
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};
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/**
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@ -731,6 +735,13 @@ static void command_table_init(AHCICommand *cmd)
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memset(fis->aux, 0x00, ARRAY_SIZE(fis->aux));
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}
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void ahci_command_enable_atapi_dma(AHCICommand *cmd)
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{
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RegH2DFIS *fis = &(cmd->fis);
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g_assert(cmd->props->atapi);
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fis->feature_low |= 0x01;
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}
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AHCICommand *ahci_command_create(uint8_t command_name)
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{
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AHCICommandProp *props = ahci_command_find(command_name);
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@ -767,8 +778,22 @@ AHCICommand *ahci_command_create(uint8_t command_name)
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return cmd;
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}
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AHCICommand *ahci_atapi_command_create(uint8_t scsi_cmd)
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{
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AHCICommand *cmd = ahci_command_create(CMD_PACKET);
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cmd->atapi_cmd = g_malloc0(16);
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cmd->atapi_cmd[0] = scsi_cmd;
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/* ATAPI needs a PIO transfer chunk size set inside of the LBA registers.
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* The block/sector size is a natural default. */
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cmd->fis.lba_lo[1] = ATAPI_SECTOR_SIZE >> 8 & 0xFF;
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cmd->fis.lba_lo[2] = ATAPI_SECTOR_SIZE & 0xFF;
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return cmd;
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}
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void ahci_command_free(AHCICommand *cmd)
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{
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g_free(cmd->atapi_cmd);
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g_free(cmd);
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}
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@ -782,10 +807,31 @@ void ahci_command_clr_flags(AHCICommand *cmd, uint16_t cmdh_flags)
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cmd->header.flags &= ~cmdh_flags;
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}
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static void ahci_atapi_command_set_offset(AHCICommand *cmd, uint64_t lba)
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{
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unsigned char *cbd = cmd->atapi_cmd;
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g_assert(cbd);
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switch (cbd[0]) {
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case CMD_ATAPI_READ_10:
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g_assert_cmpuint(lba, <=, UINT32_MAX);
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stl_be_p(&cbd[2], lba);
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break;
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default:
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/* SCSI doesn't have uniform packet formats,
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* so you have to add support for it manually. Sorry! */
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g_assert_not_reached();
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}
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}
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void ahci_command_set_offset(AHCICommand *cmd, uint64_t lba_sect)
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{
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RegH2DFIS *fis = &(cmd->fis);
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if (cmd->props->lba28) {
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if (cmd->props->atapi) {
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ahci_atapi_command_set_offset(cmd, lba_sect);
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return;
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} else if (cmd->props->lba28) {
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g_assert_cmphex(lba_sect, <=, 0xFFFFFFF);
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} else if (cmd->props->lba48 || cmd->props->ncq) {
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g_assert_cmphex(lba_sect, <=, 0xFFFFFFFFFFFF);
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@ -811,6 +857,24 @@ void ahci_command_set_buffer(AHCICommand *cmd, uint64_t buffer)
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cmd->buffer = buffer;
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}
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static void ahci_atapi_set_size(AHCICommand *cmd, uint64_t xbytes)
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{
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unsigned char *cbd = cmd->atapi_cmd;
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uint64_t nsectors = xbytes / 2048;
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g_assert(cbd);
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switch (cbd[0]) {
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case CMD_ATAPI_READ_10:
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g_assert_cmpuint(nsectors, <=, UINT16_MAX);
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stw_be_p(&cbd[7], nsectors);
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break;
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default:
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/* SCSI doesn't have uniform packet formats,
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* so you have to add support for it manually. Sorry! */
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g_assert_not_reached();
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}
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}
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void ahci_command_set_sizes(AHCICommand *cmd, uint64_t xbytes,
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unsigned prd_size)
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{
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@ -829,6 +893,8 @@ void ahci_command_set_sizes(AHCICommand *cmd, uint64_t xbytes,
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NCQFIS *nfis = (NCQFIS *)&(cmd->fis);
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nfis->sector_low = sect_count & 0xFF;
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nfis->sector_hi = (sect_count >> 8) & 0xFF;
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} else if (cmd->props->atapi) {
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ahci_atapi_set_size(cmd, xbytes);
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} else {
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cmd->fis.count = sect_count;
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}
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@ -877,9 +943,14 @@ void ahci_command_commit(AHCIQState *ahci, AHCICommand *cmd, uint8_t port)
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g_assert((table_ptr & 0x7F) == 0x00);
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cmd->header.ctba = table_ptr;
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/* Commit the command header and command FIS */
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/* Commit the command header (part of the Command List Buffer) */
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ahci_set_command_header(ahci, port, cmd->slot, &(cmd->header));
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/* Now, write the command table (FIS, ACMD, and PRDT) -- FIS first, */
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ahci_write_fis(ahci, cmd);
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/* Then ATAPI CMD, if needed */
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if (cmd->props->atapi) {
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memwrite(table_ptr + 0x40, cmd->atapi_cmd, 16);
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}
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/* Construct and write the PRDs to the command table */
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g_assert_cmphex(prdtl, ==, cmd->header.prdtl);
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@ -244,6 +244,10 @@
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#define AHCI_VERSION_1_3 (0x00010300)
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#define AHCI_SECTOR_SIZE (512)
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#define ATAPI_SECTOR_SIZE (2048)
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#define AHCI_SIGNATURE_CDROM (0xeb140101)
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#define AHCI_SIGNATURE_DISK (0x00000101)
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/* FIS types */
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enum {
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@ -277,11 +281,18 @@ enum {
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CMD_READ_MAX_EXT = 0x27,
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CMD_FLUSH_CACHE = 0xE7,
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CMD_IDENTIFY = 0xEC,
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CMD_PACKET = 0xA0,
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CMD_PACKET_ID = 0xA1,
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/* NCQ */
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READ_FPDMA_QUEUED = 0x60,
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WRITE_FPDMA_QUEUED = 0x61,
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};
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/* ATAPI Commands */
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enum {
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CMD_ATAPI_READ_10 = 0x28,
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};
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/* AHCI Command Header Flags & Masks*/
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#define CMDH_CFL (0x1F)
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#define CMDH_ATAPI (0x20)
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@ -561,6 +572,7 @@ void ahci_io(AHCIQState *ahci, uint8_t port, uint8_t ide_cmd,
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/* Command Lifecycle */
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AHCICommand *ahci_command_create(uint8_t command_name);
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AHCICommand *ahci_atapi_command_create(uint8_t scsi_cmd);
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void ahci_command_commit(AHCIQState *ahci, AHCICommand *cmd, uint8_t port);
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void ahci_command_issue(AHCIQState *ahci, AHCICommand *cmd);
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void ahci_command_issue_async(AHCIQState *ahci, AHCICommand *cmd);
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@ -577,6 +589,8 @@ void ahci_command_set_size(AHCICommand *cmd, uint64_t xbytes);
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void ahci_command_set_prd_size(AHCICommand *cmd, unsigned prd_size);
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void ahci_command_set_sizes(AHCICommand *cmd, uint64_t xbytes,
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unsigned prd_size);
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void ahci_command_set_acmd(AHCICommand *cmd, void *acmd);
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void ahci_command_enable_atapi_dma(AHCICommand *cmd);
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void ahci_command_adjust(AHCICommand *cmd, uint64_t lba_sect, uint64_t gbuffer,
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uint64_t xbytes, unsigned prd_size);
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