target/ppc: Enable RADIX mmu mode for pseries TCG guest
Now that we have added all the infrastructure we can enable a pseries TCG guest to use radix. In order to do this we have to add the appropriate bits to the ibm,arch-vec-5-platform-support vector to represent that we support both hash and radix mmu models. A radix guest can now be booted in pseries tcg mode by specifying: -cpu POWER9 Note that we assume hash, that is we allocate a hpt, until a guest tells us otherwise via a H_REGISTER_PROCESS_TABLE call with radix specified - in which case we free the hpt. If we were right and the guest is hash then there's nothing for us to do. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -855,6 +855,8 @@ static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt)
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* option vector 5: */
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static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
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{
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PowerPCCPU *first_ppc_cpu = POWERPC_CPU(first_cpu);
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char val[2 * 3] = {
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24, 0x00, /* Hash/Radix, filled in below. */
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25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
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@ -870,8 +872,13 @@ static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
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val[1] = 0x00; /* Hash */
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}
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} else {
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/* TODO: TCG case, hash */
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val[1] = 0x00;
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if (first_ppc_cpu->env.mmu_model & POWERPC_MMU_V3) {
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/* V3 MMU supports both hash and radix (with dynamic switching) */
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val[1] = 0xC0;
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} else {
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/* Otherwise we can only do hash */
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val[1] = 0x00;
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}
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}
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_FDT(fdt_setprop(fdt, chosen, "ibm,arch-vec-5-platform-support",
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val, sizeof(val)));
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@ -2101,8 +2108,8 @@ static void ppc_spapr_init(MachineState *machine)
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}
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spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);
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if (kvmppc_has_cap_mmu_radix()) {
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/* KVM always allows GTSE with radix... */
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if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) {
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/* KVM and TCG always allow GTSE with radix... */
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spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE);
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}
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/* ... but not with hash (currently). */
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