mirror of https://gitlab.com/qemu-project/qemu
target/mips: Add bit encoding for MXU operand getting pattern 'optn3'
Add bit encoding for MXU operand getting pattern 'optn3'. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Craig Janeczek <jancraig@amazon.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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@ -24001,6 +24001,16 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
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#define MXU_OPTN2_HW 2
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#define MXU_OPTN2_HW 2
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#define MXU_OPTN2_XW 3
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#define MXU_OPTN2_XW 3
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/* MXU operand getting pattern 'optn3' */
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#define MXU_OPTN3_PTN0 0
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#define MXU_OPTN3_PTN1 1
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#define MXU_OPTN3_PTN2 2
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#define MXU_OPTN3_PTN3 3
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#define MXU_OPTN3_PTN4 4
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#define MXU_OPTN3_PTN5 5
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#define MXU_OPTN3_PTN6 6
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#define MXU_OPTN3_PTN7 7
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/*
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/*
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*
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*
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