microblaze: Move the saving of the reservation addr into gen_load
No functional change. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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@ -863,7 +863,7 @@ static void dec_imm(DisasContext *dc)
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}
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static inline void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
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unsigned int size)
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unsigned int size, bool exclusive)
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{
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int mem_index = cpu_mmu_index(dc->env);
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@ -875,6 +875,10 @@ static inline void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
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tcg_gen_qemu_ld32u(dst, addr, mem_index);
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} else
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cpu_abort(dc->env, "Incorrect load size %d\n", size);
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if (exclusive) {
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tcg_gen_st_tl(addr, cpu_env, offsetof(CPUMBState, res_addr));
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}
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}
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static inline TCGv *compute_ldst_addr(DisasContext *dc, TCGv *t)
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@ -1046,7 +1050,7 @@ static void dec_load(DisasContext *dc)
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* into v. If the load succeeds, we verify alignment of the
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* address and if that succeeds we write into the destination reg.
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*/
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gen_load(dc, v, *addr, size);
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gen_load(dc, v, *addr, size, ex);
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tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc);
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gen_helper_memalign(cpu_env, *addr, tcg_const_tl(dc->rd),
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@ -1061,20 +1065,19 @@ static void dec_load(DisasContext *dc)
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tcg_temp_free(v);
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} else {
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if (dc->rd) {
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gen_load(dc, cpu_R[dc->rd], *addr, size);
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gen_load(dc, cpu_R[dc->rd], *addr, size, ex);
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if (rev) {
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dec_byteswap(dc, cpu_R[dc->rd], cpu_R[dc->rd], size);
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}
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} else {
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/* We are loading into r0, no need to reverse. */
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gen_load(dc, env_imm, *addr, size);
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gen_load(dc, env_imm, *addr, size, ex);
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}
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}
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if (ex) { /* lwx */
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/* no support for for AXI exclusive so always clear C */
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write_carryi(dc, 0);
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tcg_gen_st_tl(*addr, cpu_env, offsetof(CPUMBState, res_addr));
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}
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if (addr == &t)
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