hw/net: npcm7xx_emc fix missing queue_flush
The rx_active boolean change to true should always trigger a try_read call that flushes the queue. Signed-off-by: Patrick Venture <venture@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20211203221002.1719306-1-venture@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -284,6 +284,12 @@ static void emc_halt_rx(NPCM7xxEMCState *emc, uint32_t mista_flag)
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emc_set_mista(emc, mista_flag);
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}
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static void emc_enable_rx_and_flush(NPCM7xxEMCState *emc)
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{
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emc->rx_active = true;
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qemu_flush_queued_packets(qemu_get_queue(emc->nic));
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}
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static void emc_set_next_tx_descriptor(NPCM7xxEMCState *emc,
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const NPCM7xxEMCTxDesc *tx_desc,
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uint32_t desc_addr)
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@ -581,13 +587,6 @@ static ssize_t emc_receive(NetClientState *nc, const uint8_t *buf, size_t len1)
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return len;
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}
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static void emc_try_receive_next_packet(NPCM7xxEMCState *emc)
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{
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if (emc_can_receive(qemu_get_queue(emc->nic))) {
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qemu_flush_queued_packets(qemu_get_queue(emc->nic));
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}
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}
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static uint64_t npcm7xx_emc_read(void *opaque, hwaddr offset, unsigned size)
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{
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NPCM7xxEMCState *emc = opaque;
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@ -703,7 +702,7 @@ static void npcm7xx_emc_write(void *opaque, hwaddr offset,
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emc->regs[REG_MGSTA] |= REG_MGSTA_RXHA;
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}
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if (value & REG_MCMDR_RXON) {
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emc->rx_active = true;
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emc_enable_rx_and_flush(emc);
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} else {
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emc_halt_rx(emc, 0);
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}
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@ -739,8 +738,7 @@ static void npcm7xx_emc_write(void *opaque, hwaddr offset,
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break;
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case REG_RSDR:
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if (emc->regs[REG_MCMDR] & REG_MCMDR_RXON) {
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emc->rx_active = true;
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emc_try_receive_next_packet(emc);
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emc_enable_rx_and_flush(emc);
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}
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break;
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case REG_MIIDA:
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