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target/mips: Remove CPUMIPSState::CP0_SAAR[2] field

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Remove the unused CP0_SAAR[2] registers.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240209090513.9401-8-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-02-09 08:49:43 +01:00
parent addd0c2874
commit 5235993f98
2 changed files with 1 additions and 2 deletions
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1
target/mips/cpu.h
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@ -749,7 +749,6 @@ typedef struct CPUArchState {
int32_t CP0_Count;
uint32_t CP0_SAARI;
#define CP0SAARI_TARGET 0 /* 5..0 */
uint64_t CP0_SAAR[2];
#define CP0SAAR_BASE 12 /* 43..12 */
#define CP0SAAR_SIZE 1 /* 5..1 */
#define CP0SAAR_EN 0

2
target/mips/sysemu/machine.c
View File

@ -282,7 +282,7 @@ const VMStateDescription vmstate_mips_cpu = {
VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
VMSTATE_INT32(env.CP0_Count, MIPSCPU),
VMSTATE_UINT32(env.CP0_SAARI, MIPSCPU),
VMSTATE_UINT64_ARRAY(env.CP0_SAAR, MIPSCPU, 2),
VMSTATE_UNUSED(2 * sizeof(uint64_t)), /* was CP0_SAAR[2] */
VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
VMSTATE_INT32(env.CP0_Compare, MIPSCPU),
VMSTATE_INT32(env.CP0_Status, MIPSCPU),