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target/microblaze: Convert dec_stream to decodetree

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Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-08-24 20:13:45 -07:00
parent 9df297a2d8
commit 52065d8f46
2 changed files with 55 additions and 15 deletions
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6
target/microblaze/insns.decode
View File

@ -159,6 +159,9 @@ flt 010110 ..... ..... ----- 0101 000 0000 @typea0
fint 010110 ..... ..... ----- 0110 000 0000 @typea0 fint 010110 ..... ..... ----- 0110 000 0000 @typea0
fsqrt 010110 ..... ..... 00000 0111 000 0000 @typea0 fsqrt 010110 ..... ..... 00000 0111 000 0000 @typea0
get 011011 rd:5 00000 0 ctrl:5 000000 imm:4
getd 010011 rd:5 00000 rb:5 0 ctrl:5 00000
idiv 010010 ..... ..... ..... 000 0000 0000 @typea idiv 010010 ..... ..... ..... 000 0000 0000 @typea
idivu 010010 ..... ..... ..... 000 0000 0010 @typea idivu 010010 ..... ..... ..... 000 0000 0010 @typea
@ -201,6 +204,9 @@ pcmpbf 100000 ..... ..... ..... 100 0000 0000 @typea
pcmpeq 100010 ..... ..... ..... 100 0000 0000 @typea pcmpeq 100010 ..... ..... ..... 100 0000 0000 @typea
pcmpne 100011 ..... ..... ..... 100 0000 0000 @typea pcmpne 100011 ..... ..... ..... 100 0000 0000 @typea
put 011011 00000 ra:5 1 ctrl:5 000000 imm:4
putd 010011 00000 ra:5 rb:5 1 ctrl:5 00000
rsub 000001 ..... ..... ..... 000 0000 0000 @typea rsub 000001 ..... ..... ..... 000 0000 0000 @typea
rsubc 000011 ..... ..... ..... 000 0000 0000 @typea rsubc 000011 ..... ..... ..... 000 0000 0000 @typea
rsubk 000101 ..... ..... ..... 000 0000 0000 @typea rsubk 000101 ..... ..... ..... 000 0000 0000 @typea

64
target/microblaze/translate.c
View File

@ -1560,33 +1560,68 @@ static void dec_null(DisasContext *dc)
} }
/* Insns connected to FSL or AXI stream attached devices. */ /* Insns connected to FSL or AXI stream attached devices. */
static void dec_stream(DisasContext *dc) static bool do_get(DisasContext *dc, int rd, int rb, int imm, int ctrl)
{ {
TCGv_i32 t_id, t_ctrl; TCGv_i32 t_id, t_ctrl;
int ctrl;
if (trap_userspace(dc, true)) { if (trap_userspace(dc, true)) {
return; return true;
} }
t_id = tcg_temp_new_i32(); t_id = tcg_temp_new_i32();
if (dc->type_b) { if (rb) {
tcg_gen_movi_i32(t_id, dc->imm & 0xf); tcg_gen_andi_i32(t_id, cpu_R[rb], 0xf);
ctrl = dc->imm >> 10;
} else { } else {
tcg_gen_andi_i32(t_id, cpu_R[dc->rb], 0xf); tcg_gen_movi_i32(t_id, imm);
ctrl = dc->imm >> 5;
} }
t_ctrl = tcg_const_i32(ctrl); t_ctrl = tcg_const_i32(ctrl);
gen_helper_get(reg_for_write(dc, rd), t_id, t_ctrl);
if (dc->rd == 0) {
gen_helper_put(t_id, t_ctrl, cpu_R[dc->ra]);
} else {
gen_helper_get(cpu_R[dc->rd], t_id, t_ctrl);
}
tcg_temp_free_i32(t_id); tcg_temp_free_i32(t_id);
tcg_temp_free_i32(t_ctrl); tcg_temp_free_i32(t_ctrl);
return true;
}
static bool trans_get(DisasContext *dc, arg_get *arg)
{
return do_get(dc, arg->rd, 0, arg->imm, arg->ctrl);
}
static bool trans_getd(DisasContext *dc, arg_getd *arg)
{
return do_get(dc, arg->rd, arg->rb, 0, arg->ctrl);
}
static bool do_put(DisasContext *dc, int ra, int rb, int imm, int ctrl)
{
TCGv_i32 t_id, t_ctrl;
if (trap_userspace(dc, true)) {
return true;
}
t_id = tcg_temp_new_i32();
if (rb) {
tcg_gen_andi_i32(t_id, cpu_R[rb], 0xf);
} else {
tcg_gen_movi_i32(t_id, imm);
}
t_ctrl = tcg_const_i32(ctrl);
gen_helper_put(t_id, t_ctrl, reg_for_read(dc, ra));
tcg_temp_free_i32(t_id);
tcg_temp_free_i32(t_ctrl);
return true;
}
static bool trans_put(DisasContext *dc, arg_put *arg)
{
return do_put(dc, arg->ra, 0, arg->imm, arg->ctrl);
}
static bool trans_putd(DisasContext *dc, arg_putd *arg)
{
return do_put(dc, arg->ra, arg->rb, 0, arg->ctrl);
} }
static struct decoder_info { static struct decoder_info {
@ -1596,7 +1631,6 @@ static struct decoder_info {
}; };
void (*dec)(DisasContext *dc); void (*dec)(DisasContext *dc);
} decinfo[] = { } decinfo[] = {
{DEC_STREAM, dec_stream},
{{0, 0}, dec_null} {{0, 0}, dec_null}
}; };