m48t59: Fix a wrong opaque passed to nvram read and write routines
This fixes boot on PPC prep. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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parent
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51f9b84e75
11
hw/m48t59.c
11
hw/m48t59.c
@ -642,6 +642,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base,
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DeviceState *dev;
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SysBusDevice *s;
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M48t59SysBusState *d;
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M48t59State *state;
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dev = qdev_create(NULL, "m48t59");
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qdev_prop_set_uint32(dev, "type", type);
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@ -649,18 +650,18 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base,
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qdev_prop_set_uint32(dev, "io_base", io_base);
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qdev_init_nofail(dev);
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s = sysbus_from_qdev(dev);
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d = FROM_SYSBUS(M48t59SysBusState, s);
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state = &d->state;
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sysbus_connect_irq(s, 0, IRQ);
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if (io_base != 0) {
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register_ioport_read(io_base, 0x04, 1, NVRAM_readb, s);
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register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s);
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register_ioport_read(io_base, 0x04, 1, NVRAM_readb, state);
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register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, state);
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}
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if (mem_base != 0) {
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sysbus_mmio_map(s, 0, mem_base);
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}
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d = FROM_SYSBUS(M48t59SysBusState, s);
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return &d->state;
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return state;
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}
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M48t59State *m48t59_init_isa(uint32_t io_base, uint16_t size, int type)
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