target/arm/cpu: Update coding style to make checkpatch.pl happy
We will move this code in the next commit. Clean it up first to avoid checkpatch.pl errors. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200423073358.27155-5-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -582,7 +582,8 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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CPUARMState *env = &cpu->env;
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bool ret = false;
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/* ARMv7-M interrupt masking works differently than -A or -R.
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/*
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* ARMv7-M interrupt masking works differently than -A or -R.
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* There is no FIQ/IRQ distinction. Instead of I and F bits
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* masking FIQ and IRQ interrupts, an exception is taken only
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* if it is higher priority than the current execution priority
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@ -1912,7 +1913,8 @@ static void arm1026_initfn(Object *obj)
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static void arm1136_r2_initfn(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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/* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
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/*
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* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
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* older core than plain "arm1136". In particular this does not
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* have the v6K features.
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* These ID register values are correct for 1136 but may be wrong
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@ -2698,7 +2700,8 @@ static const ARMCPUInfo arm_cpus[] = {
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{ .name = "arm926", .initfn = arm926_initfn },
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{ .name = "arm946", .initfn = arm946_initfn },
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{ .name = "arm1026", .initfn = arm1026_initfn },
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/* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
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/*
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* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
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* older core than plain "arm1136". In particular this does not
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* have the v6K features.
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*/
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