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target/arm: Fix SME full tile indexing

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For the outer product set of insns, which take an entire matrix
tile as output, the argument is not a combined tile+column.
Therefore using get_tile_rowcol was incorrect, as we extracted
the tile number from itself.

The test case relies only on assembler support for SME, since
no release of GCC recognizes -march=armv9-a+sme yet.

Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1620
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230622151201.1578522-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: dropped now-unneeded changes to sysregs CFLAGS]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 1f51573f79)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Richard Henderson 2023-07-04 14:08:48 +01:00 committed by Michael Tokarev
parent 13cf40e594
commit 518c3dfdfb
3 changed files with 107 additions and 7 deletions
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24
target/arm/translate-sme.c
View File

@ -103,6 +103,21 @@ static TCGv_ptr get_tile_rowcol(DisasContext *s, int esz, int rs,
return addr;
}
/*
* Resolve tile.size[0] to a host pointer.
* Used by e.g. outer product insns where we require the entire tile.
*/
static TCGv_ptr get_tile(DisasContext *s, int esz, int tile)
{
TCGv_ptr addr = tcg_temp_new_ptr();
int offset;
offset = tile * sizeof(ARMVectorReg) + offsetof(CPUARMState, zarray);
tcg_gen_addi_ptr(addr, cpu_env, offset);
return addr;
}
static bool trans_ZERO(DisasContext *s, arg_ZERO *a)
{
if (!dc_isar_feature(aa64_sme, s)) {
@ -279,8 +294,7 @@ static bool do_adda(DisasContext *s, arg_adda *a, MemOp esz,
return true;
}
/* Sum XZR+zad to find ZAd. */
za = get_tile_rowcol(s, esz, 31, a->zad, false);
za = get_tile(s, esz, a->zad);
zn = vec_full_reg_ptr(s, a->zn);
pn = pred_full_reg_ptr(s, a->pn);
pm = pred_full_reg_ptr(s, a->pm);
@ -310,8 +324,7 @@ static bool do_outprod(DisasContext *s, arg_op *a, MemOp esz,
return true;
}
/* Sum XZR+zad to find ZAd. */
za = get_tile_rowcol(s, esz, 31, a->zad, false);
za = get_tile(s, esz, a->zad);
zn = vec_full_reg_ptr(s, a->zn);
zm = vec_full_reg_ptr(s, a->zm);
pn = pred_full_reg_ptr(s, a->pn);
@ -337,8 +350,7 @@ static bool do_outprod_fpst(DisasContext *s, arg_op *a, MemOp esz,
return true;
}
/* Sum XZR+zad to find ZAd. */
za = get_tile_rowcol(s, esz, 31, a->zad, false);
za = get_tile(s, esz, a->zad);
zn = vec_full_reg_ptr(s, a->zn);
zm = vec_full_reg_ptr(s, a->zm);
pn = pred_full_reg_ptr(s, a->pn);

7
tests/tcg/aarch64/Makefile.target
View File

@ -24,7 +24,7 @@ config-cc.mak: Makefile
$(call cc-option,-march=armv8.3-a, CROSS_CC_HAS_ARMV8_3); \
$(call cc-option,-mbranch-protection=standard, CROSS_CC_HAS_ARMV8_BTI); \
$(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE); \
$(call cc-option,-march=armv9-a+sme, CROSS_CC_HAS_ARMV9_SME)) 3> config-cc.mak
$(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak
-include config-cc.mak
# Pauth Tests
@ -51,6 +51,11 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7
mte-%: CFLAGS += -march=armv8.5-a+memtag
endif
# SME Tests
ifneq ($(CROSS_AS_HAS_ARMV9_SME),)
AARCH64_TESTS += sme-outprod1
endif
# System Registers Tests
AARCH64_TESTS += sysregs

83
tests/tcg/aarch64/sme-outprod1.c Normal file
View File

@ -0,0 +1,83 @@
/*
* SME outer product, 1 x 1.
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include <stdio.h>
extern void foo(float *dst);
asm(
" .arch_extension sme\n"
" .type foo, @function\n"
"foo:\n"
" stp x29, x30, [sp, -80]!\n"
" mov x29, sp\n"
" stp d8, d9, [sp, 16]\n"
" stp d10, d11, [sp, 32]\n"
" stp d12, d13, [sp, 48]\n"
" stp d14, d15, [sp, 64]\n"
" smstart\n"
" ptrue p0.s, vl4\n"
" fmov z0.s, #1.0\n"
/*
* An outer product of a vector of 1.0 by itself should be a matrix of 1.0.
* Note that we are using tile 1 here (za1.s) rather than tile 0.
*/
" zero {za}\n"
" fmopa za1.s, p0/m, p0/m, z0.s, z0.s\n"
/*
* Read the first 4x4 sub-matrix of elements from tile 1:
* Note that za1h should be interchangable here.
*/
" mov w12, #0\n"
" mova z0.s, p0/m, za1v.s[w12, #0]\n"
" mova z1.s, p0/m, za1v.s[w12, #1]\n"
" mova z2.s, p0/m, za1v.s[w12, #2]\n"
" mova z3.s, p0/m, za1v.s[w12, #3]\n"
/*
* And store them to the input pointer (dst in the C code):
*/
" st1w {z0.s}, p0, [x0]\n"
" add x0, x0, #16\n"
" st1w {z1.s}, p0, [x0]\n"
" add x0, x0, #16\n"
" st1w {z2.s}, p0, [x0]\n"
" add x0, x0, #16\n"
" st1w {z3.s}, p0, [x0]\n"
" smstop\n"
" ldp d8, d9, [sp, 16]\n"
" ldp d10, d11, [sp, 32]\n"
" ldp d12, d13, [sp, 48]\n"
" ldp d14, d15, [sp, 64]\n"
" ldp x29, x30, [sp], 80\n"
" ret\n"
" .size foo, . - foo"
);
int main()
{
float dst[16];
int i, j;
foo(dst);
for (i = 0; i < 16; i++) {
if (dst[i] != 1.0f) {
break;
}
}
if (i == 16) {
return 0; /* success */
}
/* failure */
for (i = 0; i < 4; ++i) {
for (j = 0; j < 4; ++j) {
printf("%f ", (double)dst[i * 4 + j]);
}
printf("\n");
}
return 1;
}