From 51855ecf1a9d5a8388778571b8ab32134e83f378 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 24 Sep 2012 12:06:15 -0700 Subject: [PATCH] target-s390: Fix PSW_MASK handling We were treating psw.mask as the 32-bit quantity it is in ESA mode. In particular, the CC field was at the wrong place. Signed-off-by: Richard Henderson --- target-s390x/helper.c | 9 +++++---- target-s390x/translate.c | 2 ++ 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/target-s390x/helper.c b/target-s390x/helper.c index 42e06eb85e..7dc4d46eac 100644 --- a/target-s390x/helper.c +++ b/target-s390x/helper.c @@ -454,18 +454,19 @@ void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr) env->psw.addr = addr; env->psw.mask = mask; - env->cc_op = (mask >> 13) & 3; + env->cc_op = (mask >> 44) & 3; } static uint64_t get_psw_mask(CPUS390XState *env) { - uint64_t r = env->psw.mask; + uint64_t r; env->cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr); - r &= ~(3ULL << 13); + r = env->psw.mask; + r &= ~PSW_MASK_CC; assert(!(env->cc_op & ~3)); - r |= env->cc_op << 13; + r |= (uint64_t)env->cc_op << 44; return r; } diff --git a/target-s390x/translate.c b/target-s390x/translate.c index b8f2ca8678..dc0f9cc8b9 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -4559,6 +4559,8 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) tcg_gen_qemu_ld32u(tmp2, tmp, get_mem_index(s)); tcg_gen_addi_i64(tmp, tmp, 4); tcg_gen_qemu_ld32u(tmp3, tmp, get_mem_index(s)); + /* Convert the 32-bit PSW_MASK into the 64-bit PSW_MASK. */ + tcg_gen_shli_i64(tmp2, tmp2, 32); gen_helper_load_psw(cpu_env, tmp2, tmp3); tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp2);