tcg: move setcond* ops to non-optional section
setcond is not an optional op, move it to the non-optional section. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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add1e7ea61
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5105c5564c
72
tcg/tcg-op.h
72
tcg/tcg-op.h
@ -589,6 +589,20 @@ static inline void tcg_gen_brcondi_i32(int cond, TCGv_i32 arg1, int32_t arg2,
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tcg_temp_free_i32(t0);
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}
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static inline void tcg_gen_setcond_i32(int cond, TCGv_i32 ret,
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TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond);
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}
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static inline void tcg_gen_setcondi_i32(int cond, TCGv_i32 ret, TCGv_i32 arg1,
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int32_t arg2)
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{
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TCGv_i32 t0 = tcg_const_i32(arg2);
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tcg_gen_setcond_i32(cond, ret, arg1, t0);
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tcg_temp_free_i32(t0);
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}
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static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
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@ -851,6 +865,15 @@ static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
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TCGV_HIGH(arg2), cond, label_index);
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}
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static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret,
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TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret),
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TCGV_LOW(arg1), TCGV_HIGH(arg1),
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TCGV_LOW(arg2), TCGV_HIGH(arg2), cond);
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tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
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}
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static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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TCGv_i64 t0;
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@ -1081,6 +1104,12 @@ static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
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tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
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}
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static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret,
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TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op4i_i64(INDEX_op_setcond_i64, ret, arg1, arg2, cond);
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}
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static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
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@ -1184,6 +1213,14 @@ static inline void tcg_gen_brcondi_i64(int cond, TCGv_i64 arg1, int64_t arg2,
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tcg_temp_free_i64(t0);
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}
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static inline void tcg_gen_setcondi_i64(int cond, TCGv_i64 ret, TCGv_i64 arg1,
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int64_t arg2)
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{
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TCGv_i64 t0 = tcg_const_i64(arg2);
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tcg_gen_setcond_i64(cond, ret, arg1, t0);
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tcg_temp_free_i64(t0);
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}
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static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
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{
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TCGv_i64 t0 = tcg_const_i64(arg2);
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@ -1821,41 +1858,6 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
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}
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}
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static inline void tcg_gen_setcond_i32(int cond, TCGv_i32 ret,
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TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond);
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}
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static inline void tcg_gen_setcondi_i32(int cond, TCGv_i32 ret, TCGv_i32 arg1,
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int32_t arg2)
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{
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TCGv_i32 t0 = tcg_const_i32(arg2);
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tcg_gen_setcond_i32(cond, ret, arg1, t0);
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tcg_temp_free_i32(t0);
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}
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static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret,
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TCGv_i64 arg1, TCGv_i64 arg2)
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{
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#if TCG_TARGET_REG_BITS == 64
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tcg_gen_op4i_i64(INDEX_op_setcond_i64, ret, arg1, arg2, cond);
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#else
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tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret),
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TCGV_LOW(arg1), TCGV_HIGH(arg1),
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TCGV_LOW(arg2), TCGV_HIGH(arg2), cond);
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tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
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#endif
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}
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static inline void tcg_gen_setcondi_i64(int cond, TCGv_i64 ret, TCGv_i64 arg1,
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int64_t arg2)
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{
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TCGv_i64 t0 = tcg_const_i64(arg2);
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tcg_gen_setcond_i64(cond, ret, arg1, t0);
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tcg_temp_free_i64(t0);
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}
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/***************************************/
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/* QEMU specific operations. Their type depend on the QEMU CPU
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type. */
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