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cris: Mask interrupts on dslots for CRISv10.

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CRISv10 cores (unlike v32) do not take any interrupts while delayed
jumps are pending (delay slots).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Edgar E. Iglesias 2010-02-20 19:17:29 +01:00
parent ff21f70afd
commit 4ffb9ae2e1
1 changed files with 4 additions and 0 deletions
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4
target-cris/translate_v10.c
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@ -1187,6 +1187,10 @@ static unsigned int crisv10_decoder(DisasContext *dc)
dc->cpustate_changed = 1; dc->cpustate_changed = 1;
} }
/* CRISv10 locks out interrupts on dslots. */
if (dc->delayed_branch == 2) {
cris_lock_irq(dc);
}
return insn_len; return insn_len;
} }