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hw/arm/fsl-imx25: Wire up watchdog

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With this commit, the watchdog on imx25-pdk is fully operational,
including pretimeout support.

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 20200517162135.110364-4-linux@roeck-us.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Guenter Roeck 2020-05-17 09:21:30 -07:00 committed by Peter Maydell
parent daca13d495
commit 4f0aff00f9
3 changed files with 16 additions and 0 deletions
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1
hw/arm/Kconfig
View File

@ -359,6 +359,7 @@ config FSL_IMX25
select IMX
select IMX_FEC
select IMX_I2C
select WDT_IMX2
select DS1338
config FSL_IMX31

10
hw/arm/fsl-imx25.c
View File

@ -87,6 +87,7 @@ static void fsl_imx25_init(Object *obj)
TYPE_CHIPIDEA);
}
sysbus_init_child_obj(obj, "wdt", &s->wdt, sizeof(s->wdt), TYPE_IMX2_WDT);
}
static void fsl_imx25_realize(DeviceState *dev, Error **errp)
@ -302,6 +303,15 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
usb_table[i].irq));
}
/* Watchdog */
object_property_set_bool(OBJECT(&s->wdt), true, "pretimeout-support",
&error_abort);
object_property_set_bool(OBJECT(&s->wdt), true, "realized", &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX25_WDT_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt), 0,
qdev_get_gpio_in(DEVICE(&s->avic),
FSL_IMX25_WDT_IRQ));
/* initialize 2 x 16 KB ROM */
memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0",
FSL_IMX25_ROM0_SIZE, &err);

5
include/hw/arm/fsl-imx25.h
View File

@ -29,6 +29,7 @@
#include "hw/gpio/imx_gpio.h"
#include "hw/sd/sdhci.h"
#include "hw/usb/chipidea.h"
#include "hw/watchdog/wdt_imx2.h"
#include "exec/memory.h"
#include "target/arm/cpu.h"
@ -60,6 +61,7 @@ typedef struct FslIMX25State {
IMXGPIOState gpio[FSL_IMX25_NUM_GPIOS];
SDHCIState esdhc[FSL_IMX25_NUM_ESDHCS];
ChipideaState usb[FSL_IMX25_NUM_USBS];
IMX2WdtState wdt;
MemoryRegion rom[2];
MemoryRegion iram;
MemoryRegion iram_alias;
@ -229,6 +231,8 @@ typedef struct FslIMX25State {
#define FSL_IMX25_GPIO1_SIZE 0x4000
#define FSL_IMX25_GPIO2_ADDR 0x53FD0000
#define FSL_IMX25_GPIO2_SIZE 0x4000
#define FSL_IMX25_WDT_ADDR 0x53FDC000
#define FSL_IMX25_WDT_SIZE 0x4000
#define FSL_IMX25_USB1_ADDR 0x53FF4000
#define FSL_IMX25_USB1_SIZE 0x0200
#define FSL_IMX25_USB2_ADDR 0x53FF4400
@ -268,5 +272,6 @@ typedef struct FslIMX25State {
#define FSL_IMX25_ESDHC2_IRQ 8
#define FSL_IMX25_USB1_IRQ 37
#define FSL_IMX25_USB2_IRQ 35
#define FSL_IMX25_WDT_IRQ 55
#endif /* FSL_IMX25_H */