mirror of https://gitlab.com/qemu-project/qemu
target-mips: optimize gen_flt3_ldst()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7044 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1124,7 +1124,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
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int base, int16_t offset)
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int base, int16_t offset)
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{
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{
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const char *opn = "flt_ldst";
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const char *opn = "flt_ldst";
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TCGv t0 = tcg_temp_local_new();
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TCGv t0 = tcg_temp_new();
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if (base == 0) {
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if (base == 0) {
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tcg_gen_movi_tl(t0, offset);
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tcg_gen_movi_tl(t0, offset);
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@ -7152,8 +7152,8 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
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{
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{
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const char *opn = "extended float load/store";
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const char *opn = "extended float load/store";
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int store = 0;
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int store = 0;
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TCGv t0 = tcg_temp_local_new();
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TCGv t0 = tcg_temp_new();
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TCGv t1 = tcg_temp_local_new();
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TCGv t1 = tcg_temp_new();
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if (base == 0) {
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if (base == 0) {
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gen_load_gpr(t0, index);
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gen_load_gpr(t0, index);
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@ -7165,6 +7165,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
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}
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}
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/* Don't do NOP if destination is zero: we must perform the actual
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/* Don't do NOP if destination is zero: we must perform the actual
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memory access. */
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memory access. */
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save_cpu_state(ctx, 0);
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switch (opc) {
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switch (opc) {
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case OPC_LWXC1:
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case OPC_LWXC1:
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check_cop1x(ctx);
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check_cop1x(ctx);
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@ -7241,12 +7242,6 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
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opn = "suxc1";
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opn = "suxc1";
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store = 1;
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store = 1;
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break;
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break;
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default:
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MIPS_INVAL(opn);
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generate_exception(ctx, EXCP_RI);
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tcg_temp_free(t0);
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tcg_temp_free(t1);
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return;
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}
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}
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tcg_temp_free(t0);
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tcg_temp_free(t0);
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tcg_temp_free(t1);
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tcg_temp_free(t1);
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