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target/ppc: add vhyp addressing mode helper for radix MMU

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The radix on vhyp MMU uses a single-level radix table walk, with the
partition scope mapping provided by the flat QEMU machine memory.

A subsequent change will use the two-level radix walk on vhyp in some
situations, so provide a helper which can abstract that logic.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20220216102545.1808018-5-npiggin@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Nicholas Piggin 2022-02-18 08:34:14 +01:00 committed by Cédric Le Goater
parent 93aeb70210
commit 4dce0bde30
1 changed files with 15 additions and 4 deletions
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19
target/ppc/mmu-radix64.c
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@ -354,6 +354,17 @@ static int ppc_radix64_partition_scoped_xlate(PowerPCCPU *cpu,
return 0; return 0;
} }
/*
* The spapr vhc has a flat partition scope provided by qemu memory.
*/
static bool vhyp_flat_addressing(PowerPCCPU *cpu)
{
if (cpu->vhyp) {
return true;
}
return false;
}
static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,
MMUAccessType access_type, MMUAccessType access_type,
vaddr eaddr, uint64_t pid, vaddr eaddr, uint64_t pid,
@ -385,7 +396,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,
} }
prtbe_addr = (pate.dw1 & PATE1_R_PRTB) + offset; prtbe_addr = (pate.dw1 & PATE1_R_PRTB) + offset;
if (cpu->vhyp) { if (vhyp_flat_addressing(cpu)) {
prtbe0 = ldq_phys(cs->as, prtbe_addr); prtbe0 = ldq_phys(cs->as, prtbe_addr);
} else { } else {
/* /*
@ -411,7 +422,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,
*g_page_size = PRTBE_R_GET_RTS(prtbe0); *g_page_size = PRTBE_R_GET_RTS(prtbe0);
base_addr = prtbe0 & PRTBE_R_RPDB; base_addr = prtbe0 & PRTBE_R_RPDB;
nls = prtbe0 & PRTBE_R_RPDS; nls = prtbe0 & PRTBE_R_RPDS;
if (msr_hv || cpu->vhyp) { if (msr_hv || vhyp_flat_addressing(cpu)) {
/* /*
* Can treat process table addresses as real addresses * Can treat process table addresses as real addresses
*/ */
@ -515,7 +526,7 @@ static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, vaddr eaddr,
relocation = !mmuidx_real(mmu_idx); relocation = !mmuidx_real(mmu_idx);
/* HV or virtual hypervisor Real Mode Access */ /* HV or virtual hypervisor Real Mode Access */
if (!relocation && (mmuidx_hv(mmu_idx) || cpu->vhyp)) { if (!relocation && (mmuidx_hv(mmu_idx) || vhyp_flat_addressing(cpu))) {
/* In real mode top 4 effective addr bits (mostly) ignored */ /* In real mode top 4 effective addr bits (mostly) ignored */
*raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL; *raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
@ -594,7 +605,7 @@ static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, vaddr eaddr,
g_raddr = eaddr & R_EADDR_MASK; g_raddr = eaddr & R_EADDR_MASK;
} }
if (cpu->vhyp) { if (vhyp_flat_addressing(cpu)) {
*raddr = g_raddr; *raddr = g_raddr;
} else { } else {
/* /*