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QOM queue, 2020-09-18

Browse Source 
Fixes:
 * Error value corrections (Markus Armbruster)
 * Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost)
 * Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson)
 
 QOM cleanups (Eduardo Habkost):
 * Rename some constants
 * Simplify parameters of OBJECT_DECLARE* macros
 * Additional DECLARE_*CHECKER* usage
 * Additional OBJECT_DECLARE_TYPE usage
 * Additional OBJECT_DECLARE_SIMPLE_TYPE usage
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Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging

QOM queue, 2020-09-18

Fixes:
* Error value corrections (Markus Armbruster)
* Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost)
* Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson)

QOM cleanups (Eduardo Habkost):
* Rename some constants
* Simplify parameters of OBJECT_DECLARE* macros
* Additional DECLARE_*CHECKER* usage
* Additional OBJECT_DECLARE_TYPE usage
* Additional OBJECT_DECLARE_SIMPLE_TYPE usage

# gpg: Signature made Fri 18 Sep 2020 21:45:29 BST
# gpg:                using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg:                issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request:
  Use OBJECT_DECLARE_SIMPLE_TYPE when possible
  Use OBJECT_DECLARE_TYPE when possible
  qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
  qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE
  scripts/codeconverter: Update to latest version
  target/s390x: Set instance_align on S390CPU TypeInfo
  target/riscv: Set instance_align on RISCVCPU TypeInfo
  target/ppc: Set instance_align on PowerPCCPU TypeInfo
  target/arm: Set instance_align on CPUARM TypeInfo
  qom: Allow objects to be allocated with increased alignment
  qom: Correct error values in two contracts
  qom: Clean up object_property_get_enum()'s error value
  qom: Correct object_class_dynamic_cast_assert() documentation
  sifive: Use DECLARE_*CHECKER* macros
  sifive: Move QOM typedefs and add missing includes
  sifive_u: Rename memmap enum constants
  sifive_e: Rename memmap enum constants

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-09-21 18:55:39 +01:00
commit 4dad0a9aa8
651 changed files with 2073 additions and 2589 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
authz/list.c
View File

@ -252,7 +252,6 @@ static const TypeInfo qauthz_list_info = {
.name = TYPE_QAUTHZ_LIST,
.instance_size = sizeof(QAuthZList),
.instance_finalize = qauthz_list_finalize,
.class_size = sizeof(QAuthZListClass),
.class_init = qauthz_list_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_USER_CREATABLE },

1
authz/listfile.c
View File

@ -263,7 +263,6 @@ static const TypeInfo qauthz_list_file_info = {
.instance_init = qauthz_list_file_init,
.instance_size = sizeof(QAuthZListFile),
.instance_finalize = qauthz_list_file_finalize,
.class_size = sizeof(QAuthZListFileClass),
.class_init = qauthz_list_file_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_USER_CREATABLE },

1
authz/pamacct.c
View File

@ -129,7 +129,6 @@ static const TypeInfo qauthz_pam_info = {
.name = TYPE_QAUTHZ_PAM,
.instance_size = sizeof(QAuthZPAM),
.instance_finalize = qauthz_pam_finalize,
.class_size = sizeof(QAuthZPAMClass),
.class_init = qauthz_pam_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_USER_CREATABLE },

1
authz/simple.c
View File

@ -96,7 +96,6 @@ static const TypeInfo qauthz_simple_info = {
.name = TYPE_QAUTHZ_SIMPLE,
.instance_size = sizeof(QAuthZSimple),
.instance_finalize = qauthz_simple_finalize,
.class_size = sizeof(QAuthZSimpleClass),
.class_init = qauthz_simple_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_USER_CREATABLE },

5
backends/cryptodev-builtin.c
View File

@ -35,10 +35,7 @@
*/
#define TYPE_CRYPTODEV_BACKEND_BUILTIN "cryptodev-backend-builtin"
typedef struct CryptoDevBackendBuiltin
CryptoDevBackendBuiltin;
DECLARE_INSTANCE_CHECKER(CryptoDevBackendBuiltin, CRYPTODEV_BACKEND_BUILTIN,
TYPE_CRYPTODEV_BACKEND_BUILTIN)
OBJECT_DECLARE_SIMPLE_TYPE(CryptoDevBackendBuiltin, CRYPTODEV_BACKEND_BUILTIN)
typedef struct CryptoDevBackendBuiltinSession {

4
backends/cryptodev-vhost-user.c
View File

@ -39,9 +39,7 @@
*/
#define TYPE_CRYPTODEV_BACKEND_VHOST_USER "cryptodev-vhost-user"
typedef struct CryptoDevBackendVhostUser CryptoDevBackendVhostUser;
DECLARE_INSTANCE_CHECKER(CryptoDevBackendVhostUser, CRYPTODEV_BACKEND_VHOST_USER,
TYPE_CRYPTODEV_BACKEND_VHOST_USER)
OBJECT_DECLARE_SIMPLE_TYPE(CryptoDevBackendVhostUser, CRYPTODEV_BACKEND_VHOST_USER)
struct CryptoDevBackendVhostUser {

5
backends/dbus-vmstate.c
View File

@ -23,8 +23,8 @@
#define TYPE_DBUS_VMSTATE "dbus-vmstate"
OBJECT_DECLARE_SIMPLE_TYPE(DBusVMState, dbus_vmstate,
DBUS_VMSTATE, ObjectClass)
OBJECT_DECLARE_SIMPLE_TYPE(DBusVMState,
DBUS_VMSTATE)
struct DBusVMState {
@ -483,7 +483,6 @@ static const TypeInfo dbus_vmstate_info = {
.parent = TYPE_OBJECT,
.instance_size = sizeof(DBusVMState),
.instance_finalize = dbus_vmstate_finalize,
.class_size = sizeof(DBusVMStateClass),
.class_init = dbus_vmstate_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_USER_CREATABLE },

4
backends/hostmem-file.c
View File

@ -19,9 +19,7 @@
#include "qom/object_interfaces.h"
#include "qom/object.h"
typedef struct HostMemoryBackendFile HostMemoryBackendFile;
DECLARE_INSTANCE_CHECKER(HostMemoryBackendFile, MEMORY_BACKEND_FILE,
TYPE_MEMORY_BACKEND_FILE)
OBJECT_DECLARE_SIMPLE_TYPE(HostMemoryBackendFile, MEMORY_BACKEND_FILE)
struct HostMemoryBackendFile {

4
backends/hostmem-memfd.c
View File

@ -21,9 +21,7 @@
#define TYPE_MEMORY_BACKEND_MEMFD "memory-backend-memfd"
typedef struct HostMemoryBackendMemfd HostMemoryBackendMemfd;
DECLARE_INSTANCE_CHECKER(HostMemoryBackendMemfd, MEMORY_BACKEND_MEMFD,
TYPE_MEMORY_BACKEND_MEMFD)
OBJECT_DECLARE_SIMPLE_TYPE(HostMemoryBackendMemfd, MEMORY_BACKEND_MEMFD)
struct HostMemoryBackendMemfd {

4
backends/rng-builtin.c
View File

@ -11,9 +11,7 @@
#include "qemu/guest-random.h"
#include "qom/object.h"
typedef struct RngBuiltin RngBuiltin;
DECLARE_INSTANCE_CHECKER(RngBuiltin, RNG_BUILTIN,
TYPE_RNG_BUILTIN)
OBJECT_DECLARE_SIMPLE_TYPE(RngBuiltin, RNG_BUILTIN)
struct RngBuiltin {
RngBackend parent;

4
backends/rng-egd.c
View File

@ -19,9 +19,7 @@
#include "qom/object.h"
#define TYPE_RNG_EGD "rng-egd"
typedef struct RngEgd RngEgd;
DECLARE_INSTANCE_CHECKER(RngEgd, RNG_EGD,
TYPE_RNG_EGD)
OBJECT_DECLARE_SIMPLE_TYPE(RngEgd, RNG_EGD)
struct RngEgd {
RngBackend parent;

4
backends/tpm/tpm_emulator.c
View File

@ -45,9 +45,7 @@
#include "qom/object.h"
#define TYPE_TPM_EMULATOR "tpm-emulator"
typedef struct TPMEmulator TPMEmulator;
DECLARE_INSTANCE_CHECKER(TPMEmulator, TPM_EMULATOR,
TYPE_TPM_EMULATOR)
OBJECT_DECLARE_SIMPLE_TYPE(TPMEmulator, TPM_EMULATOR)
#define TPM_EMULATOR_IMPLEMENTS_ALL_CAPS(S, cap) (((S)->caps & (cap)) == (cap))

4
backends/tpm/tpm_passthrough.c
View File

@ -36,9 +36,7 @@
#include "qom/object.h"
#define TYPE_TPM_PASSTHROUGH "tpm-passthrough"
typedef struct TPMPassthruState TPMPassthruState;
DECLARE_INSTANCE_CHECKER(TPMPassthruState, TPM_PASSTHROUGH,
TYPE_TPM_PASSTHROUGH)
OBJECT_DECLARE_SIMPLE_TYPE(TPMPassthruState, TPM_PASSTHROUGH)
/* data structures */
struct TPMPassthruState {

1
backends/vhost-user.c
View File

@ -197,7 +197,6 @@ static const TypeInfo vhost_user_backend_info = {
.instance_size = sizeof(VhostUserBackend),
.instance_init = vhost_user_backend_init,
.instance_finalize = vhost_user_backend_finalize,
.class_size = sizeof(VhostUserBackendClass),
};
static void register_types(void)

1
crypto/secret_keyring.c
View File

@ -129,7 +129,6 @@ static const TypeInfo qcrypto_secret_info = {
.parent = TYPE_QCRYPTO_SECRET_COMMON,
.name = TYPE_QCRYPTO_SECRET_KEYRING,
.instance_size = sizeof(QCryptoSecretKeyring),
.class_size = sizeof(QCryptoSecretKeyringClass),
.class_init = qcrypto_secret_keyring_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_USER_CREATABLE },

4
hw/9pfs/virtio-9p.h
View File

@ -13,10 +13,8 @@ struct V9fsVirtioState {
VirtQueueElement *elems[MAX_REQ];
V9fsState state;
};
typedef struct V9fsVirtioState V9fsVirtioState;
#define TYPE_VIRTIO_9P "virtio-9p-device"
DECLARE_INSTANCE_CHECKER(V9fsVirtioState, VIRTIO_9P,
TYPE_VIRTIO_9P)
OBJECT_DECLARE_SIMPLE_TYPE(V9fsVirtioState, VIRTIO_9P)
#endif

4
hw/acpi/piix4.c
View File

@ -91,10 +91,8 @@ struct PIIX4PMState {
MemHotplugState acpi_memory_hotplug;
};
typedef struct PIIX4PMState PIIX4PMState;
DECLARE_INSTANCE_CHECKER(PIIX4PMState, PIIX4_PM,
TYPE_PIIX4_PM)
OBJECT_DECLARE_SIMPLE_TYPE(PIIX4PMState, PIIX4_PM)
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
PCIBus *bus, PIIX4PMState *s);

4
hw/alpha/typhoon.c
View File

@ -50,9 +50,7 @@ typedef struct TyphoonPchip {
TyphoonWindow win[4];
} TyphoonPchip;
typedef struct TyphoonState TyphoonState;
DECLARE_INSTANCE_CHECKER(TyphoonState, TYPHOON_PCI_HOST_BRIDGE,
TYPE_TYPHOON_PCI_HOST_BRIDGE)
OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE)
struct TyphoonState {
PCIHostState parent_obj;

4
hw/arm/collie.c
View File

@ -25,11 +25,9 @@ struct CollieMachineState {
StrongARMState *sa1110;
};
typedef struct CollieMachineState CollieMachineState;
#define TYPE_COLLIE_MACHINE MACHINE_TYPE_NAME("collie")
DECLARE_INSTANCE_CHECKER(CollieMachineState, COLLIE_MACHINE,
TYPE_COLLIE_MACHINE)
OBJECT_DECLARE_SIMPLE_TYPE(CollieMachineState, COLLIE_MACHINE)
static struct arm_boot_info collie_binfo = {
.loader_start = SA_SDCS0,

4
hw/arm/highbank.c
View File

@ -156,9 +156,7 @@ static const MemoryRegionOps hb_mem_ops = {
};
#define TYPE_HIGHBANK_REGISTERS "highbank-regs"
typedef struct HighbankRegsState HighbankRegsState;
DECLARE_INSTANCE_CHECKER(HighbankRegsState, HIGHBANK_REGISTERS,
TYPE_HIGHBANK_REGISTERS)
OBJECT_DECLARE_SIMPLE_TYPE(HighbankRegsState, HIGHBANK_REGISTERS)
struct HighbankRegsState {
/*< private >*/

12
hw/arm/integratorcp.c
View File

@ -29,9 +29,7 @@
#include "qom/object.h"
#define TYPE_INTEGRATOR_CM "integrator_core"
typedef struct IntegratorCMState IntegratorCMState;
DECLARE_INSTANCE_CHECKER(IntegratorCMState, INTEGRATOR_CM,
TYPE_INTEGRATOR_CM)
OBJECT_DECLARE_SIMPLE_TYPE(IntegratorCMState, INTEGRATOR_CM)
struct IntegratorCMState {
/*< private >*/
@ -328,9 +326,7 @@ static void integratorcm_realize(DeviceState *d, Error **errp)
/* Primary interrupt controller. */
#define TYPE_INTEGRATOR_PIC "integrator_pic"
typedef struct icp_pic_state icp_pic_state;
DECLARE_INSTANCE_CHECKER(icp_pic_state, INTEGRATOR_PIC,
TYPE_INTEGRATOR_PIC)
OBJECT_DECLARE_SIMPLE_TYPE(icp_pic_state, INTEGRATOR_PIC)
struct icp_pic_state {
/*< private >*/
@ -468,9 +464,7 @@ static void icp_pic_init(Object *obj)
/* CP control registers. */
#define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs"
typedef struct ICPCtrlRegsState ICPCtrlRegsState;
DECLARE_INSTANCE_CHECKER(ICPCtrlRegsState, ICP_CONTROL_REGS,
TYPE_ICP_CONTROL_REGS)
OBJECT_DECLARE_SIMPLE_TYPE(ICPCtrlRegsState, ICP_CONTROL_REGS)
struct ICPCtrlRegsState {
/*< private >*/

4
hw/arm/microbit.c
View File

@ -26,12 +26,10 @@ struct MicrobitMachineState {
NRF51State nrf51;
MicrobitI2CState i2c;
};
typedef struct MicrobitMachineState MicrobitMachineState;
#define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit")
DECLARE_INSTANCE_CHECKER(MicrobitMachineState, MICROBIT_MACHINE,
TYPE_MICROBIT_MACHINE)
OBJECT_DECLARE_SIMPLE_TYPE(MicrobitMachineState, MICROBIT_MACHINE)
static void microbit_init(MachineState *machine)
{

5
hw/arm/mps2-tz.c
View File

@ -77,7 +77,6 @@ struct MPS2TZMachineClass {
uint32_t scc_id;
const char *armsse_type;
};
typedef struct MPS2TZMachineClass MPS2TZMachineClass;
struct MPS2TZMachineState {
MachineState parent;
@ -102,14 +101,12 @@ struct MPS2TZMachineState {
DeviceState *lan9118;
SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ];
};
typedef struct MPS2TZMachineState MPS2TZMachineState;
#define TYPE_MPS2TZ_MACHINE "mps2tz"
#define TYPE_MPS2TZ_AN505_MACHINE MACHINE_TYPE_NAME("mps2-an505")
#define TYPE_MPS2TZ_AN521_MACHINE MACHINE_TYPE_NAME("mps2-an521")
DECLARE_OBJ_CHECKERS(MPS2TZMachineState, MPS2TZMachineClass,
MPS2TZ_MACHINE, TYPE_MPS2TZ_MACHINE)
OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE)
/* Main SYSCLK frequency in Hz */
#define SYSCLK_FRQ 20000000

5
hw/arm/mps2.c
View File

@ -63,7 +63,6 @@ struct MPS2MachineClass {
hwaddr ethernet_base;
hwaddr psram_base;
};
typedef struct MPS2MachineClass MPS2MachineClass;
struct MPS2MachineState {
MachineState parent;
@ -85,7 +84,6 @@ struct MPS2MachineState {
CMSDKAPBDualTimer dualtimer;
CMSDKAPBWatchdog watchdog;
};
typedef struct MPS2MachineState MPS2MachineState;
#define TYPE_MPS2_MACHINE "mps2"
#define TYPE_MPS2_AN385_MACHINE MACHINE_TYPE_NAME("mps2-an385")
@ -93,8 +91,7 @@ typedef struct MPS2MachineState MPS2MachineState;
#define TYPE_MPS2_AN500_MACHINE MACHINE_TYPE_NAME("mps2-an500")
#define TYPE_MPS2_AN511_MACHINE MACHINE_TYPE_NAME("mps2-an511")
DECLARE_OBJ_CHECKERS(MPS2MachineState, MPS2MachineClass,
MPS2_MACHINE, TYPE_MPS2_MACHINE)
OBJECT_DECLARE_TYPE(MPS2MachineState, MPS2MachineClass, MPS2_MACHINE)
/* Main SYSCLK frequency in Hz */
#define SYSCLK_FRQ 25000000

5
hw/arm/musca.c
View File

@ -55,7 +55,6 @@ struct MuscaMachineClass {
const MPCInfo *mpc_info;
int num_mpcs;
};
typedef struct MuscaMachineClass MuscaMachineClass;
struct MuscaMachineState {
MachineState parent;
@ -84,14 +83,12 @@ struct MuscaMachineState {
UnimplementedDeviceState gpio;
UnimplementedDeviceState cryptoisland;
};
typedef struct MuscaMachineState MuscaMachineState;
#define TYPE_MUSCA_MACHINE "musca"
#define TYPE_MUSCA_A_MACHINE MACHINE_TYPE_NAME("musca-a")
#define TYPE_MUSCA_B1_MACHINE MACHINE_TYPE_NAME("musca-b1")
DECLARE_OBJ_CHECKERS(MuscaMachineState, MuscaMachineClass,
MUSCA_MACHINE, TYPE_MUSCA_MACHINE)
OBJECT_DECLARE_TYPE(MuscaMachineState, MuscaMachineClass, MUSCA_MACHINE)
/*
* Main SYSCLK frequency in Hz

32
hw/arm/musicpal.c
View File

@ -155,9 +155,7 @@ typedef struct mv88w8618_rx_desc {
} mv88w8618_rx_desc;
#define TYPE_MV88W8618_ETH "mv88w8618_eth"
typedef struct mv88w8618_eth_state mv88w8618_eth_state;
DECLARE_INSTANCE_CHECKER(mv88w8618_eth_state, MV88W8618_ETH,
TYPE_MV88W8618_ETH)
OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_eth_state, MV88W8618_ETH)
struct mv88w8618_eth_state {
/*< private >*/
@ -485,9 +483,7 @@ static const TypeInfo mv88w8618_eth_info = {
#define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */
#define TYPE_MUSICPAL_LCD "musicpal_lcd"
typedef struct musicpal_lcd_state musicpal_lcd_state;
DECLARE_INSTANCE_CHECKER(musicpal_lcd_state, MUSICPAL_LCD,
TYPE_MUSICPAL_LCD)
OBJECT_DECLARE_SIMPLE_TYPE(musicpal_lcd_state, MUSICPAL_LCD)
struct musicpal_lcd_state {
/*< private >*/
@ -703,9 +699,7 @@ static const TypeInfo musicpal_lcd_info = {
#define MP_PIC_ENABLE_CLR 0x0C
#define TYPE_MV88W8618_PIC "mv88w8618_pic"
typedef struct mv88w8618_pic_state mv88w8618_pic_state;
DECLARE_INSTANCE_CHECKER(mv88w8618_pic_state, MV88W8618_PIC,
TYPE_MV88W8618_PIC)
OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pic_state, MV88W8618_PIC)
struct mv88w8618_pic_state {
/*< private >*/
@ -841,9 +835,7 @@ typedef struct mv88w8618_timer_state {
} mv88w8618_timer_state;
#define TYPE_MV88W8618_PIT "mv88w8618_pit"
typedef struct mv88w8618_pit_state mv88w8618_pit_state;
DECLARE_INSTANCE_CHECKER(mv88w8618_pit_state, MV88W8618_PIT,
TYPE_MV88W8618_PIT)
OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pit_state, MV88W8618_PIT)
struct mv88w8618_pit_state {
/*< private >*/
@ -1009,9 +1001,7 @@ static const TypeInfo mv88w8618_pit_info = {
#define MP_FLASHCFG_CFGR0 0x04
#define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg"
typedef struct mv88w8618_flashcfg_state mv88w8618_flashcfg_state;
DECLARE_INSTANCE_CHECKER(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG,
TYPE_MV88W8618_FLASHCFG)
OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG)
struct mv88w8618_flashcfg_state {
/*< private >*/
@ -1100,11 +1090,9 @@ struct MusicPalMiscState {
SysBusDevice parent_obj;
MemoryRegion iomem;
};
typedef struct MusicPalMiscState MusicPalMiscState;
#define TYPE_MUSICPAL_MISC "musicpal-misc"
DECLARE_INSTANCE_CHECKER(MusicPalMiscState, MUSICPAL_MISC,
TYPE_MUSICPAL_MISC)
OBJECT_DECLARE_SIMPLE_TYPE(MusicPalMiscState, MUSICPAL_MISC)
static uint64_t musicpal_misc_read(void *opaque, hwaddr offset,
unsigned size)
@ -1209,9 +1197,7 @@ static void mv88w8618_wlan_realize(DeviceState *dev, Error **errp)
#define MP_OE_LCD_BRIGHTNESS 0x0007
#define TYPE_MUSICPAL_GPIO "musicpal_gpio"
typedef struct musicpal_gpio_state musicpal_gpio_state;
DECLARE_INSTANCE_CHECKER(musicpal_gpio_state, MUSICPAL_GPIO,
TYPE_MUSICPAL_GPIO)
OBJECT_DECLARE_SIMPLE_TYPE(musicpal_gpio_state, MUSICPAL_GPIO)
struct musicpal_gpio_state {
/*< private >*/
@ -1460,9 +1446,7 @@ static const TypeInfo musicpal_gpio_info = {
#define MP_KEY_BTN_NAVIGATION (1 << 7)
#define TYPE_MUSICPAL_KEY "musicpal_key"
typedef struct musicpal_key_state musicpal_key_state;
DECLARE_INSTANCE_CHECKER(musicpal_key_state, MUSICPAL_KEY,
TYPE_MUSICPAL_KEY)
OBJECT_DECLARE_SIMPLE_TYPE(musicpal_key_state, MUSICPAL_KEY)
struct musicpal_key_state {
/*< private >*/

4
hw/arm/palm.c
View File

@ -133,9 +133,7 @@ static void palmte_button_event(void *opaque, int keycode)
*/
#define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
typedef struct PalmMiscGPIOState PalmMiscGPIOState;
DECLARE_INSTANCE_CHECKER(PalmMiscGPIOState, PALM_MISC_GPIO,
TYPE_PALM_MISC_GPIO)
OBJECT_DECLARE_SIMPLE_TYPE(PalmMiscGPIOState, PALM_MISC_GPIO)
struct PalmMiscGPIOState {
SysBusDevice parent_obj;

12
hw/arm/pxa2xx.c
View File

@ -470,9 +470,7 @@ static const VMStateDescription vmstate_pxa2xx_mm = {
};
#define TYPE_PXA2XX_SSP "pxa2xx-ssp"
typedef struct PXA2xxSSPState PXA2xxSSPState;
DECLARE_INSTANCE_CHECKER(PXA2xxSSPState, PXA2XX_SSP,
TYPE_PXA2XX_SSP)
OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxSSPState, PXA2XX_SSP)
/* Synchronous Serial Ports */
struct PXA2xxSSPState {
@ -811,9 +809,7 @@ static void pxa2xx_ssp_init(Object *obj)
#define PIAR 0x38 /* RTC Periodic Interrupt Alarm register */
#define TYPE_PXA2XX_RTC "pxa2xx_rtc"
typedef struct PXA2xxRTCState PXA2xxRTCState;
DECLARE_INSTANCE_CHECKER(PXA2xxRTCState, PXA2XX_RTC,
TYPE_PXA2XX_RTC)
OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxRTCState, PXA2XX_RTC)
struct PXA2xxRTCState {
/*< private >*/
@ -1245,9 +1241,7 @@ static const TypeInfo pxa2xx_rtc_sysbus_info = {
/* I2C Interface */
#define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave"
typedef struct PXA2xxI2CSlaveState PXA2xxI2CSlaveState;
DECLARE_INSTANCE_CHECKER(PXA2xxI2CSlaveState, PXA2XX_I2C_SLAVE,
TYPE_PXA2XX_I2C_SLAVE)
OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxI2CSlaveState, PXA2XX_I2C_SLAVE)
struct PXA2xxI2CSlaveState {
I2CSlave parent_obj;

4
hw/arm/pxa2xx_gpio.c
View File

@ -22,9 +22,7 @@
#define PXA2XX_GPIO_BANKS 4
#define TYPE_PXA2XX_GPIO "pxa2xx-gpio"
typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo;
DECLARE_INSTANCE_CHECKER(PXA2xxGPIOInfo, PXA2XX_GPIO,
TYPE_PXA2XX_GPIO)
OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxGPIOInfo, PXA2XX_GPIO)
struct PXA2xxGPIOInfo {
/*< private >*/

4
hw/arm/pxa2xx_pic.c
View File

@ -38,9 +38,7 @@
#define PXA2XX_PIC_SRCS 40
#define TYPE_PXA2XX_PIC "pxa2xx_pic"
typedef struct PXA2xxPICState PXA2xxPICState;
DECLARE_INSTANCE_CHECKER(PXA2xxPICState, PXA2XX_PIC,
TYPE_PXA2XX_PIC)
OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxPICState, PXA2XX_PIC)
struct PXA2xxPICState {
/*< private >*/

4
hw/arm/sbsa-ref.c
View File

@ -95,11 +95,9 @@ struct SBSAMachineState {
DeviceState *gic;
PFlashCFI01 *flash[2];
};
typedef struct SBSAMachineState SBSAMachineState;
#define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref")
DECLARE_INSTANCE_CHECKER(SBSAMachineState, SBSA_MACHINE,
TYPE_SBSA_MACHINE)
OBJECT_DECLARE_SIMPLE_TYPE(SBSAMachineState, SBSA_MACHINE)
static const MemMapEntry sbsa_ref_memmap[] = {
/* 512M boot ROM */

25
hw/arm/spitz.c
View File

@ -43,7 +43,6 @@ struct SpitzMachineClass {
enum spitz_model_e model;
int arm_id;
};
typedef struct SpitzMachineClass SpitzMachineClass;
struct SpitzMachineState {
MachineState parent;
@ -56,11 +55,9 @@ struct SpitzMachineState {
DeviceState *scp1;
DeviceState *misc_gpio;
};
typedef struct SpitzMachineState SpitzMachineState;
#define TYPE_SPITZ_MACHINE "spitz-common"
DECLARE_OBJ_CHECKERS(SpitzMachineState, SpitzMachineClass,
SPITZ_MACHINE, TYPE_SPITZ_MACHINE)
OBJECT_DECLARE_TYPE(SpitzMachineState, SpitzMachineClass, SPITZ_MACHINE)
#define zaurus_printf(format, ...) \
fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__)
@ -84,9 +81,7 @@ DECLARE_OBJ_CHECKERS(SpitzMachineState, SpitzMachineClass,
#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
#define TYPE_SL_NAND "sl-nand"
typedef struct SLNANDState SLNANDState;
DECLARE_INSTANCE_CHECKER(SLNANDState, SL_NAND,
TYPE_SL_NAND)
OBJECT_DECLARE_SIMPLE_TYPE(SLNANDState, SL_NAND)
struct SLNANDState {
SysBusDevice parent_obj;
@ -262,9 +257,7 @@ static const int spitz_gpiomap[5] = {
};
#define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
typedef struct SpitzKeyboardState SpitzKeyboardState;
DECLARE_INSTANCE_CHECKER(SpitzKeyboardState, SPITZ_KEYBOARD,
TYPE_SPITZ_KEYBOARD)
OBJECT_DECLARE_SIMPLE_TYPE(SpitzKeyboardState, SPITZ_KEYBOARD)
struct SpitzKeyboardState {
SysBusDevice parent_obj;
@ -582,9 +575,7 @@ static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
#define LCDTG_POLCTRL 0x07
#define TYPE_SPITZ_LCDTG "spitz-lcdtg"
typedef struct SpitzLCDTG SpitzLCDTG;
DECLARE_INSTANCE_CHECKER(SpitzLCDTG, SPITZ_LCDTG,
TYPE_SPITZ_LCDTG)
OBJECT_DECLARE_SIMPLE_TYPE(SpitzLCDTG, SPITZ_LCDTG)
struct SpitzLCDTG {
SSISlave ssidev;
@ -672,9 +663,7 @@ static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp)
#define SPITZ_GPIO_TP_INT 11
#define TYPE_CORGI_SSP "corgi-ssp"
typedef struct CorgiSSPState CorgiSSPState;
DECLARE_INSTANCE_CHECKER(CorgiSSPState, CORGI_SSP,
TYPE_CORGI_SSP)
OBJECT_DECLARE_SIMPLE_TYPE(CorgiSSPState, CORGI_SSP)
/* "Demux" the signal based on current chipselect */
struct CorgiSSPState {
@ -825,9 +814,7 @@ static void spitz_akita_i2c_setup(PXA2xxState *cpu)
* + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x
*/
#define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio"
typedef struct SpitzMiscGPIOState SpitzMiscGPIOState;
DECLARE_INSTANCE_CHECKER(SpitzMiscGPIOState, SPITZ_MISC_GPIO,
TYPE_SPITZ_MISC_GPIO)
OBJECT_DECLARE_SIMPLE_TYPE(SpitzMiscGPIOState, SPITZ_MISC_GPIO)
struct SpitzMiscGPIOState {
SysBusDevice parent_obj;

8
hw/arm/stellaris.c
View File

@ -58,9 +58,7 @@ typedef const struct {
/* General purpose timer module. */
#define TYPE_STELLARIS_GPTM "stellaris-gptm"
typedef struct gptm_state gptm_state;
DECLARE_INSTANCE_CHECKER(gptm_state, STELLARIS_GPTM,
TYPE_STELLARIS_GPTM)
OBJECT_DECLARE_SIMPLE_TYPE(gptm_state, STELLARIS_GPTM)
struct gptm_state {
SysBusDevice parent_obj;
@ -721,9 +719,7 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
/* I2C controller. */
#define TYPE_STELLARIS_I2C "stellaris-i2c"
typedef struct stellaris_i2c_state stellaris_i2c_state;
DECLARE_INSTANCE_CHECKER(stellaris_i2c_state, STELLARIS_I2C,
TYPE_STELLARIS_I2C)
OBJECT_DECLARE_SIMPLE_TYPE(stellaris_i2c_state, STELLARIS_I2C)
struct stellaris_i2c_state {
SysBusDevice parent_obj;

24
hw/arm/strongarm.c
View File

@ -85,9 +85,7 @@ static struct {
/* Interrupt Controller */
#define TYPE_STRONGARM_PIC "strongarm_pic"
typedef struct StrongARMPICState StrongARMPICState;
DECLARE_INSTANCE_CHECKER(StrongARMPICState, STRONGARM_PIC,
TYPE_STRONGARM_PIC)
OBJECT_DECLARE_SIMPLE_TYPE(StrongARMPICState, STRONGARM_PIC)
struct StrongARMPICState {
SysBusDevice parent_obj;
@ -254,9 +252,7 @@ static const TypeInfo strongarm_pic_info = {
* f = 32 768 / (RTTR_trim + 1) */
#define TYPE_STRONGARM_RTC "strongarm-rtc"
typedef struct StrongARMRTCState StrongARMRTCState;
DECLARE_INSTANCE_CHECKER(StrongARMRTCState, STRONGARM_RTC,
TYPE_STRONGARM_RTC)
OBJECT_DECLARE_SIMPLE_TYPE(StrongARMRTCState, STRONGARM_RTC)
struct StrongARMRTCState {
SysBusDevice parent_obj;
@ -481,9 +477,7 @@ static const TypeInfo strongarm_rtc_sysbus_info = {
#define GAFR 0x1c
#define TYPE_STRONGARM_GPIO "strongarm-gpio"
typedef struct StrongARMGPIOInfo StrongARMGPIOInfo;
DECLARE_INSTANCE_CHECKER(StrongARMGPIOInfo, STRONGARM_GPIO,
TYPE_STRONGARM_GPIO)
OBJECT_DECLARE_SIMPLE_TYPE(StrongARMGPIOInfo, STRONGARM_GPIO)
struct StrongARMGPIOInfo {
SysBusDevice busdev;
@ -720,9 +714,7 @@ static const TypeInfo strongarm_gpio_info = {
#define PPFR 0x10
#define TYPE_STRONGARM_PPC "strongarm-ppc"
typedef struct StrongARMPPCInfo StrongARMPPCInfo;
DECLARE_INSTANCE_CHECKER(StrongARMPPCInfo, STRONGARM_PPC,
TYPE_STRONGARM_PPC)
OBJECT_DECLARE_SIMPLE_TYPE(StrongARMPPCInfo, STRONGARM_PPC)
struct StrongARMPPCInfo {
SysBusDevice parent_obj;
@ -921,9 +913,7 @@ static const TypeInfo strongarm_ppc_info = {
#define RX_FIFO_ROR (1 << 10)
#define TYPE_STRONGARM_UART "strongarm-uart"
typedef struct StrongARMUARTState StrongARMUARTState;
DECLARE_INSTANCE_CHECKER(StrongARMUARTState, STRONGARM_UART,
TYPE_STRONGARM_UART)
OBJECT_DECLARE_SIMPLE_TYPE(StrongARMUARTState, STRONGARM_UART)
struct StrongARMUARTState {
SysBusDevice parent_obj;
@ -1353,9 +1343,7 @@ static const TypeInfo strongarm_uart_info = {
/* Synchronous Serial Ports */
#define TYPE_STRONGARM_SSP "strongarm-ssp"
typedef struct StrongARMSSPState StrongARMSSPState;
DECLARE_INSTANCE_CHECKER(StrongARMSSPState, STRONGARM_SSP,
TYPE_STRONGARM_SSP)
OBJECT_DECLARE_SIMPLE_TYPE(StrongARMSSPState, STRONGARM_SSP)
struct StrongARMSSPState {
SysBusDevice parent_obj;

8
hw/arm/tosa.c
View File

@ -75,9 +75,7 @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
*/
#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
typedef struct TosaMiscGPIOState TosaMiscGPIOState;
DECLARE_INSTANCE_CHECKER(TosaMiscGPIOState, TOSA_MISC_GPIO,
TYPE_TOSA_MISC_GPIO)
OBJECT_DECLARE_SIMPLE_TYPE(TosaMiscGPIOState, TOSA_MISC_GPIO)
struct TosaMiscGPIOState {
SysBusDevice parent_obj;
@ -172,9 +170,7 @@ static void tosa_ssp_realize(SSISlave *dev, Error **errp)
}
#define TYPE_TOSA_DAC "tosa_dac"
typedef struct TosaDACState TosaDACState;
DECLARE_INSTANCE_CHECKER(TosaDACState, TOSA_DAC,
TYPE_TOSA_DAC)
OBJECT_DECLARE_SIMPLE_TYPE(TosaDACState, TOSA_DAC)
struct TosaDACState {
I2CSlave parent_obj;

4
hw/arm/versatilepb.c
View File

@ -35,9 +35,7 @@
/* Primary interrupt controller. */
#define TYPE_VERSATILE_PB_SIC "versatilepb_sic"
typedef struct vpb_sic_state vpb_sic_state;
DECLARE_INSTANCE_CHECKER(vpb_sic_state, VERSATILE_PB_SIC,
TYPE_VERSATILE_PB_SIC)
OBJECT_DECLARE_SIMPLE_TYPE(vpb_sic_state, VERSATILE_PB_SIC)
struct vpb_sic_state {
SysBusDevice parent_obj;

5
hw/arm/vexpress.c
View File

@ -171,20 +171,17 @@ struct VexpressMachineClass {
MachineClass parent;
VEDBoardInfo *daughterboard;
};
typedef struct VexpressMachineClass VexpressMachineClass;
struct VexpressMachineState {
MachineState parent;
bool secure;
bool virt;
};
typedef struct VexpressMachineState VexpressMachineState;
#define TYPE_VEXPRESS_MACHINE "vexpress"
#define TYPE_VEXPRESS_A9_MACHINE MACHINE_TYPE_NAME("vexpress-a9")
#define TYPE_VEXPRESS_A15_MACHINE MACHINE_TYPE_NAME("vexpress-a15")
DECLARE_OBJ_CHECKERS(VexpressMachineState, VexpressMachineClass,
VEXPRESS_MACHINE, TYPE_VEXPRESS_MACHINE)
OBJECT_DECLARE_TYPE(VexpressMachineState, VexpressMachineClass, VEXPRESS_MACHINE)
typedef void DBoardInitFn(const VexpressMachineState *machine,
ram_addr_t ram_size,

4
hw/arm/xilinx_zynq.c
View File

@ -40,9 +40,7 @@
#include "qom/object.h"
#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
typedef struct ZynqMachineState ZynqMachineState;
DECLARE_INSTANCE_CHECKER(ZynqMachineState, ZYNQ_MACHINE,
TYPE_ZYNQ_MACHINE)
OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
/* board base frequency: 33.333333 MHz */
#define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3)

4
hw/arm/xlnx-versal-virt.c
View File

@ -25,9 +25,7 @@
#include "qom/object.h"
#define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
typedef struct VersalVirt VersalVirt;
DECLARE_INSTANCE_CHECKER(VersalVirt, XLNX_VERSAL_VIRT_MACHINE,
TYPE_XLNX_VERSAL_VIRT_MACHINE)
OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE)
struct VersalVirt {
MachineState parent_obj;

4
hw/arm/xlnx-zcu102.c
View File

@ -36,11 +36,9 @@ struct XlnxZCU102 {
struct arm_boot_info binfo;
};
typedef struct XlnxZCU102 XlnxZCU102;
#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
DECLARE_INSTANCE_CHECKER(XlnxZCU102, ZCU102_MACHINE,
TYPE_ZCU102_MACHINE)
OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102, ZCU102_MACHINE)
static bool zcu102_get_secure(Object *obj, Error **errp)

8
hw/arm/z2.c
View File

@ -111,11 +111,9 @@ struct ZipitLCD {
uint32_t cur_reg;
int pos;
};
typedef struct ZipitLCD ZipitLCD;
#define TYPE_ZIPIT_LCD "zipit-lcd"
DECLARE_INSTANCE_CHECKER(ZipitLCD, ZIPIT_LCD,
TYPE_ZIPIT_LCD)
OBJECT_DECLARE_SIMPLE_TYPE(ZipitLCD, ZIPIT_LCD)
static uint32_t zipit_lcd_transfer(SSISlave *dev, uint32_t value)
{
@ -198,9 +196,7 @@ static const TypeInfo zipit_lcd_info = {
};
#define TYPE_AER915 "aer915"
typedef struct AER915State AER915State;
DECLARE_INSTANCE_CHECKER(AER915State, AER915,
TYPE_AER915)
OBJECT_DECLARE_SIMPLE_TYPE(AER915State, AER915)
struct AER915State {
I2CSlave parent_obj;

4
hw/audio/ac97.c
View File

@ -127,9 +127,7 @@ enum {
#define MUTE_SHIFT 15
#define TYPE_AC97 "AC97"
typedef struct AC97LinkState AC97LinkState;
DECLARE_INSTANCE_CHECKER(AC97LinkState, AC97,
TYPE_AC97)
OBJECT_DECLARE_SIMPLE_TYPE(AC97LinkState, AC97)
#define REC_MASK 7
enum {

4
hw/audio/adlib.c
View File

@ -52,9 +52,7 @@
#define SHIFT 1
#define TYPE_ADLIB "adlib"
typedef struct AdlibState AdlibState;
DECLARE_INSTANCE_CHECKER(AdlibState, ADLIB,
TYPE_ADLIB)
OBJECT_DECLARE_SIMPLE_TYPE(AdlibState, ADLIB)
struct AdlibState {
ISADevice parent_obj;

3
hw/audio/es1370.c
View File

@ -293,8 +293,7 @@ struct chan_bits {
};
#define TYPE_ES1370 "ES1370"
DECLARE_INSTANCE_CHECKER(ES1370State, ES1370,
TYPE_ES1370)
OBJECT_DECLARE_SIMPLE_TYPE(ES1370State, ES1370)
static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
uint32_t *old_freq, uint32_t *new_freq);

4
hw/audio/gus.c
View File

@ -43,9 +43,7 @@
#endif
#define TYPE_GUS "gus"
typedef struct GUSState GUSState;
DECLARE_INSTANCE_CHECKER(GUSState, GUS,
TYPE_GUS)
OBJECT_DECLARE_SIMPLE_TYPE(GUSState, GUS)
struct GUSState {
ISADevice dev;

3
hw/audio/hda-codec.c
View File

@ -172,8 +172,7 @@ struct HDAAudioStream {
};
#define TYPE_HDA_AUDIO "hda-audio"
DECLARE_INSTANCE_CHECKER(HDAAudioState, HDA_AUDIO,
TYPE_HDA_AUDIO)
OBJECT_DECLARE_SIMPLE_TYPE(HDAAudioState, HDA_AUDIO)
struct HDAAudioState {
HDACodecDevice hda;

6
hw/audio/intel-hda.h
View File

@ -9,12 +9,10 @@
#define TYPE_HDA_CODEC_DEVICE "hda-codec"
OBJECT_DECLARE_TYPE(HDACodecDevice, HDACodecDeviceClass,
hda_codec_device, HDA_CODEC_DEVICE)
HDA_CODEC_DEVICE)
#define TYPE_HDA_BUS "HDA"
typedef struct HDACodecBus HDACodecBus;
DECLARE_INSTANCE_CHECKER(HDACodecBus, HDA_BUS,
TYPE_HDA_BUS)
OBJECT_DECLARE_SIMPLE_TYPE(HDACodecBus, HDA_BUS)
typedef void (*hda_codec_response_func)(HDACodecDevice *dev,

4
hw/audio/marvell_88w8618.c
View File

@ -43,9 +43,7 @@
#define MP_AUDIO_CLOCK_24MHZ (1 << 9)
#define MP_AUDIO_MONO (1 << 14)
typedef struct mv88w8618_audio_state mv88w8618_audio_state;
DECLARE_INSTANCE_CHECKER(mv88w8618_audio_state, MV88W8618_AUDIO,
TYPE_MV88W8618_AUDIO)
OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_audio_state, MV88W8618_AUDIO)
struct mv88w8618_audio_state {
SysBusDevice parent_obj;

4
hw/audio/milkymist-ac97.c
View File

@ -56,9 +56,7 @@ enum {
};
#define TYPE_MILKYMIST_AC97 "milkymist-ac97"
typedef struct MilkymistAC97State MilkymistAC97State;
DECLARE_INSTANCE_CHECKER(MilkymistAC97State, MILKYMIST_AC97,
TYPE_MILKYMIST_AC97)
OBJECT_DECLARE_SIMPLE_TYPE(MilkymistAC97State, MILKYMIST_AC97)
struct MilkymistAC97State {
SysBusDevice parent_obj;

4
hw/audio/pcspk.c
View File

@ -40,9 +40,7 @@
#define PCSPK_MAX_FREQ (PCSPK_SAMPLE_RATE >> 1)
#define PCSPK_MIN_COUNT DIV_ROUND_UP(PIT_FREQ, PCSPK_MAX_FREQ)
typedef struct PCSpkState PCSpkState;
DECLARE_INSTANCE_CHECKER(PCSpkState, PC_SPEAKER,
TYPE_PC_SPEAKER)
OBJECT_DECLARE_SIMPLE_TYPE(PCSpkState, PC_SPEAKER)
struct PCSpkState {
ISADevice parent_obj;

4
hw/audio/pl041.c
View File

@ -78,9 +78,7 @@ typedef struct {
} pl041_channel;
#define TYPE_PL041 "pl041"
typedef struct PL041State PL041State;
DECLARE_INSTANCE_CHECKER(PL041State, PL041,
TYPE_PL041)
OBJECT_DECLARE_SIMPLE_TYPE(PL041State, PL041)
struct PL041State {
SysBusDevice parent_obj;

4
hw/audio/sb16.c
View File

@ -50,9 +50,7 @@
static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
#define TYPE_SB16 "sb16"
typedef struct SB16State SB16State;
DECLARE_INSTANCE_CHECKER(SB16State, SB16,
TYPE_SB16)
OBJECT_DECLARE_SIMPLE_TYPE(SB16State, SB16)
struct SB16State {
ISADevice parent_obj;

4
hw/audio/wm8750.c
View File

@ -27,9 +27,7 @@ typedef struct {
int dac_hz;
} WMRate;
typedef struct WM8750State WM8750State;
DECLARE_INSTANCE_CHECKER(WM8750State, WM8750,
TYPE_WM8750)
OBJECT_DECLARE_SIMPLE_TYPE(WM8750State, WM8750)
struct WM8750State {
I2CSlave parent_obj;

16
hw/block/fdc.c
View File

@ -65,9 +65,7 @@
/* qdev floppy bus */
#define TYPE_FLOPPY_BUS "floppy-bus"
typedef struct FloppyBus FloppyBus;
DECLARE_INSTANCE_CHECKER(FloppyBus, FLOPPY_BUS,
TYPE_FLOPPY_BUS)
OBJECT_DECLARE_SIMPLE_TYPE(FloppyBus, FLOPPY_BUS)
typedef struct FDCtrl FDCtrl;
typedef struct FDrive FDrive;
@ -497,9 +495,7 @@ static const BlockDevOps fd_block_ops = {
#define TYPE_FLOPPY_DRIVE "floppy"
typedef struct FloppyDrive FloppyDrive;
DECLARE_INSTANCE_CHECKER(FloppyDrive, FLOPPY_DRIVE,
TYPE_FLOPPY_DRIVE)
OBJECT_DECLARE_SIMPLE_TYPE(FloppyDrive, FLOPPY_DRIVE)
struct FloppyDrive {
DeviceState qdev;
@ -890,9 +886,7 @@ static FloppyDriveType get_fallback_drive_type(FDrive *drv)
}
#define TYPE_SYSBUS_FDC "base-sysbus-fdc"
typedef struct FDCtrlSysBus FDCtrlSysBus;
DECLARE_INSTANCE_CHECKER(FDCtrlSysBus, SYSBUS_FDC,
TYPE_SYSBUS_FDC)
OBJECT_DECLARE_SIMPLE_TYPE(FDCtrlSysBus, SYSBUS_FDC)
struct FDCtrlSysBus {
/*< private >*/
@ -902,9 +896,7 @@ struct FDCtrlSysBus {
struct FDCtrl state;
};
typedef struct FDCtrlISABus FDCtrlISABus;
DECLARE_INSTANCE_CHECKER(FDCtrlISABus, ISA_FDC,
TYPE_ISA_FDC)
OBJECT_DECLARE_SIMPLE_TYPE(FDCtrlISABus, ISA_FDC)
struct FDCtrlISABus {
ISADevice parent_obj;

5
hw/block/m25p80.c
View File

@ -456,17 +456,14 @@ struct Flash {
const FlashPartInfo *pi;
};
typedef struct Flash Flash;
struct M25P80Class {
SSISlaveClass parent_class;
FlashPartInfo *pi;
};
typedef struct M25P80Class M25P80Class;
#define TYPE_M25P80 "m25p80-generic"
DECLARE_OBJ_CHECKERS(Flash, M25P80Class,
M25P80, TYPE_M25P80)
OBJECT_DECLARE_TYPE(Flash, M25P80Class, M25P80)
static inline Manufacturer get_man(Flash *s)
{

3
hw/block/nand.c
View File

@ -90,8 +90,7 @@ struct NANDFlashState {
#define TYPE_NAND "nand"
DECLARE_INSTANCE_CHECKER(NANDFlashState, NAND,
TYPE_NAND)
OBJECT_DECLARE_SIMPLE_TYPE(NANDFlashState, NAND)
static void mem_and(uint8_t *dest, const uint8_t *src, size_t n)
{

4
hw/block/onenand.c
View File

@ -40,9 +40,7 @@
#define BLOCK_SHIFT (PAGE_SHIFT + 6)
#define TYPE_ONE_NAND "onenand"
typedef struct OneNANDState OneNANDState;
DECLARE_INSTANCE_CHECKER(OneNANDState, ONE_NAND,
TYPE_ONE_NAND)
OBJECT_DECLARE_SIMPLE_TYPE(OneNANDState, ONE_NAND)
struct OneNANDState {
SysBusDevice parent_obj;

4
hw/char/debugcon.c
View File

@ -33,9 +33,7 @@
#include "qom/object.h"
#define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon"
typedef struct ISADebugconState ISADebugconState;
DECLARE_INSTANCE_CHECKER(ISADebugconState, ISA_DEBUGCON_DEVICE,
TYPE_ISA_DEBUGCON_DEVICE)
OBJECT_DECLARE_SIMPLE_TYPE(ISADebugconState, ISA_DEBUGCON_DEVICE)
//#define DEBUG_DEBUGCON

4
hw/char/exynos4210_uart.c
View File

@ -139,9 +139,7 @@ typedef struct {
} Exynos4210UartFIFO;
#define TYPE_EXYNOS4210_UART "exynos4210.uart"
typedef struct Exynos4210UartState Exynos4210UartState;
DECLARE_INSTANCE_CHECKER(Exynos4210UartState, EXYNOS4210_UART,
TYPE_EXYNOS4210_UART)
OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210UartState, EXYNOS4210_UART)
struct Exynos4210UartState {
SysBusDevice parent_obj;

4
hw/char/grlib_apbuart.c
View File

@ -73,9 +73,7 @@
#define FIFO_LENGTH 1024
typedef struct UART UART;
DECLARE_INSTANCE_CHECKER(UART, GRLIB_APB_UART,
TYPE_GRLIB_APB_UART)
OBJECT_DECLARE_SIMPLE_TYPE(UART, GRLIB_APB_UART)
struct UART {
SysBusDevice parent_obj;

3
hw/char/ipoctal232.c
View File

@ -123,8 +123,7 @@ struct IPOctalState {
#define TYPE_IPOCTAL "ipoctal232"
DECLARE_INSTANCE_CHECKER(IPOctalState, IPOCTAL,
TYPE_IPOCTAL)
OBJECT_DECLARE_SIMPLE_TYPE(IPOctalState, IPOCTAL)
static const VMStateDescription vmstate_scc2698_channel = {
.name = "scc2698_channel",

4
hw/char/lm32_juart.c
View File

@ -42,9 +42,7 @@ enum {
JRX_FULL = (1<<8),
};
typedef struct LM32JuartState LM32JuartState;
DECLARE_INSTANCE_CHECKER(LM32JuartState, LM32_JUART,
TYPE_LM32_JUART)
OBJECT_DECLARE_SIMPLE_TYPE(LM32JuartState, LM32_JUART)
struct LM32JuartState {
SysBusDevice parent_obj;

4
hw/char/lm32_uart.c
View File

@ -95,9 +95,7 @@ enum {
};
#define TYPE_LM32_UART "lm32-uart"
typedef struct LM32UartState LM32UartState;
DECLARE_INSTANCE_CHECKER(LM32UartState, LM32_UART,
TYPE_LM32_UART)
OBJECT_DECLARE_SIMPLE_TYPE(LM32UartState, LM32_UART)
struct LM32UartState {
SysBusDevice parent_obj;

4
hw/char/mcf_uart.c
View File

@ -35,11 +35,9 @@ struct mcf_uart_state {
qemu_irq irq;
CharBackend chr;
};
typedef struct mcf_uart_state mcf_uart_state;
#define TYPE_MCF_UART "mcf-uart"
DECLARE_INSTANCE_CHECKER(mcf_uart_state, MCF_UART,
TYPE_MCF_UART)
OBJECT_DECLARE_SIMPLE_TYPE(mcf_uart_state, MCF_UART)
/* UART Status Register bits. */
#define MCF_UART_RxRDY 0x01

4
hw/char/milkymist-uart.c
View File

@ -58,9 +58,7 @@ enum {
};
#define TYPE_MILKYMIST_UART "milkymist-uart"
typedef struct MilkymistUartState MilkymistUartState;
DECLARE_INSTANCE_CHECKER(MilkymistUartState, MILKYMIST_UART,
TYPE_MILKYMIST_UART)
OBJECT_DECLARE_SIMPLE_TYPE(MilkymistUartState, MILKYMIST_UART)
struct MilkymistUartState {
SysBusDevice parent_obj;

4
hw/char/parallel.c
View File

@ -93,9 +93,7 @@ typedef struct ParallelState {
} ParallelState;
#define TYPE_ISA_PARALLEL "isa-parallel"
typedef struct ISAParallelState ISAParallelState;
DECLARE_INSTANCE_CHECKER(ISAParallelState, ISA_PARALLEL,
TYPE_ISA_PARALLEL)
OBJECT_DECLARE_SIMPLE_TYPE(ISAParallelState, ISA_PARALLEL)
struct ISAParallelState {
ISADevice parent_obj;

4
hw/char/serial-isa.c
View File

@ -34,9 +34,7 @@
#include "migration/vmstate.h"
#include "qom/object.h"
typedef struct ISASerialState ISASerialState;
DECLARE_INSTANCE_CHECKER(ISASerialState, ISA_SERIAL,
TYPE_ISA_SERIAL)
OBJECT_DECLARE_SIMPLE_TYPE(ISASerialState, ISA_SERIAL)
struct ISASerialState {
ISADevice parent_obj;

4
hw/char/serial-pci.c
View File

@ -40,11 +40,9 @@ struct PCISerialState {
SerialState state;
uint8_t prog_if;
};
typedef struct PCISerialState PCISerialState;
#define TYPE_PCI_SERIAL "pci-serial"
DECLARE_INSTANCE_CHECKER(PCISerialState, PCI_SERIAL,
TYPE_PCI_SERIAL)
OBJECT_DECLARE_SIMPLE_TYPE(PCISerialState, PCI_SERIAL)
static void serial_pci_realize(PCIDevice *dev, Error **errp)
{

4
hw/char/spapr_vty.c
View File

@ -18,11 +18,9 @@ struct SpaprVioVty {
uint32_t in, out;
uint8_t buf[VTERM_BUFSIZE];
};
typedef struct SpaprVioVty SpaprVioVty;
#define TYPE_VIO_SPAPR_VTY_DEVICE "spapr-vty"
DECLARE_INSTANCE_CHECKER(SpaprVioVty, VIO_SPAPR_VTY_DEVICE,
TYPE_VIO_SPAPR_VTY_DEVICE)
OBJECT_DECLARE_SIMPLE_TYPE(SpaprVioVty, VIO_SPAPR_VTY_DEVICE)
static int vty_can_receive(void *opaque)
{

4
hw/char/xilinx_uartlite.c
View File

@ -53,9 +53,7 @@
#define CONTROL_IE 0x10
#define TYPE_XILINX_UARTLITE "xlnx.xps-uartlite"
typedef struct XilinxUARTLite XilinxUARTLite;
DECLARE_INSTANCE_CHECKER(XilinxUARTLite, XILINX_UARTLITE,
TYPE_XILINX_UARTLITE)
OBJECT_DECLARE_SIMPLE_TYPE(XilinxUARTLite, XILINX_UARTLITE)
struct XilinxUARTLite {
SysBusDevice parent_obj;

4
hw/cpu/realview_mpcore.c
View File

@ -18,9 +18,7 @@
#include "qom/object.h"
#define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore"
typedef struct mpcore_rirq_state mpcore_rirq_state;
DECLARE_INSTANCE_CHECKER(mpcore_rirq_state, REALVIEW_MPCORE_RIRQ,
TYPE_REALVIEW_MPCORE_RIRQ)
OBJECT_DECLARE_SIMPLE_TYPE(mpcore_rirq_state, REALVIEW_MPCORE_RIRQ)
/* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ
controllers. The output of these, plus some of the raw input lines

4
hw/display/ads7846.c
View File

@ -29,11 +29,9 @@ struct ADS7846State {
int cycle;
int output;
};
typedef struct ADS7846State ADS7846State;
#define TYPE_ADS7846 "ads7846"
DECLARE_INSTANCE_CHECKER(ADS7846State, ADS7846,
TYPE_ADS7846)
OBJECT_DECLARE_SIMPLE_TYPE(ADS7846State, ADS7846)
/* Control-byte bitfields */
#define CB_PD0 (1 << 0)

4
hw/display/artist.c
View File

@ -25,9 +25,7 @@
#include "qom/object.h"
#define TYPE_ARTIST "artist"
typedef struct ARTISTState ARTISTState;
DECLARE_INSTANCE_CHECKER(ARTISTState, ARTIST,
TYPE_ARTIST)
OBJECT_DECLARE_SIMPLE_TYPE(ARTISTState, ARTIST)
#ifdef HOST_WORDS_BIGENDIAN
#define ROP8OFF(_i) (3 - (_i))

4
hw/display/ati_int.h
View File

@ -30,9 +30,7 @@
#define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
#define TYPE_ATI_VGA "ati-vga"
typedef struct ATIVGAState ATIVGAState;
DECLARE_INSTANCE_CHECKER(ATIVGAState, ATI_VGA,
TYPE_ATI_VGA)
OBJECT_DECLARE_SIMPLE_TYPE(ATIVGAState, ATI_VGA)
typedef struct ATIVGARegs {
uint32_t mm_index;

4
hw/display/bochs-display.c
View File

@ -55,11 +55,9 @@ struct BochsDisplayState {
/* device state */
BochsDisplayMode mode;
};
typedef struct BochsDisplayState BochsDisplayState;
#define TYPE_BOCHS_DISPLAY "bochs-display"
DECLARE_INSTANCE_CHECKER(BochsDisplayState, BOCHS_DISPLAY,
TYPE_BOCHS_DISPLAY)
OBJECT_DECLARE_SIMPLE_TYPE(BochsDisplayState, BOCHS_DISPLAY)
static const VMStateDescription vmstate_bochs_display = {
.name = "bochs-display",

4
hw/display/cg3.c
View File

@ -66,9 +66,7 @@
#define CG3_VRAM_OFFSET 0x800000
#define TYPE_CG3 "cgthree"
typedef struct CG3State CG3State;
DECLARE_INSTANCE_CHECKER(CG3State, CG3,
TYPE_CG3)
OBJECT_DECLARE_SIMPLE_TYPE(CG3State, CG3)
struct CG3State {
SysBusDevice parent_obj;

4
hw/display/cirrus_vga.c
View File

@ -183,11 +183,9 @@ struct PCICirrusVGAState {
PCIDevice dev;
CirrusVGAState cirrus_vga;
};
typedef struct PCICirrusVGAState PCICirrusVGAState;
#define TYPE_PCI_CIRRUS_VGA "cirrus-vga"
DECLARE_INSTANCE_CHECKER(PCICirrusVGAState, PCI_CIRRUS_VGA,
TYPE_PCI_CIRRUS_VGA)
OBJECT_DECLARE_SIMPLE_TYPE(PCICirrusVGAState, PCI_CIRRUS_VGA)
static uint8_t rop_to_index[256];

4
hw/display/cirrus_vga_isa.c
View File

@ -33,9 +33,7 @@
#include "qom/object.h"
#define TYPE_ISA_CIRRUS_VGA "isa-cirrus-vga"
typedef struct ISACirrusVGAState ISACirrusVGAState;
DECLARE_INSTANCE_CHECKER(ISACirrusVGAState, ISA_CIRRUS_VGA,
TYPE_ISA_CIRRUS_VGA)
OBJECT_DECLARE_SIMPLE_TYPE(ISACirrusVGAState, ISA_CIRRUS_VGA)
struct ISACirrusVGAState {
ISADevice parent_obj;

4
hw/display/exynos4210_fimd.c
View File

@ -294,9 +294,7 @@ struct Exynos4210fimdWindow {
};
#define TYPE_EXYNOS4210_FIMD "exynos4210.fimd"
typedef struct Exynos4210fimdState Exynos4210fimdState;
DECLARE_INSTANCE_CHECKER(Exynos4210fimdState, EXYNOS4210_FIMD,
TYPE_EXYNOS4210_FIMD)
OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210fimdState, EXYNOS4210_FIMD)
struct Exynos4210fimdState {
SysBusDevice parent_obj;

4
hw/display/g364fb.c
View File

@ -487,9 +487,7 @@ static void g364fb_init(DeviceState *dev, G364State *s)
}
#define TYPE_G364 "sysbus-g364"
typedef struct G364SysBusState G364SysBusState;
DECLARE_INSTANCE_CHECKER(G364SysBusState, G364,
TYPE_G364)
OBJECT_DECLARE_SIMPLE_TYPE(G364SysBusState, G364)
struct G364SysBusState {
SysBusDevice parent_obj;

4
hw/display/jazz_led.c
View File

@ -36,9 +36,7 @@ typedef enum {
} screen_state_t;
#define TYPE_JAZZ_LED "jazz-led"
typedef struct LedState LedState;
DECLARE_INSTANCE_CHECKER(LedState, JAZZ_LED,
TYPE_JAZZ_LED)
OBJECT_DECLARE_SIMPLE_TYPE(LedState, JAZZ_LED)
struct LedState {
SysBusDevice parent_obj;

4
hw/display/milkymist-tmu2.c
View File

@ -83,9 +83,7 @@ struct vertex {
} QEMU_PACKED;
#define TYPE_MILKYMIST_TMU2 "milkymist-tmu2"
typedef struct MilkymistTMU2State MilkymistTMU2State;
DECLARE_INSTANCE_CHECKER(MilkymistTMU2State, MILKYMIST_TMU2,
TYPE_MILKYMIST_TMU2)
OBJECT_DECLARE_SIMPLE_TYPE(MilkymistTMU2State, MILKYMIST_TMU2)
struct MilkymistTMU2State {
SysBusDevice parent_obj;

4
hw/display/milkymist-vgafb.c
View File

@ -69,9 +69,7 @@ enum {
};
#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
typedef struct MilkymistVgafbState MilkymistVgafbState;
DECLARE_INSTANCE_CHECKER(MilkymistVgafbState, MILKYMIST_VGAFB,
TYPE_MILKYMIST_VGAFB)
OBJECT_DECLARE_SIMPLE_TYPE(MilkymistVgafbState, MILKYMIST_VGAFB)
struct MilkymistVgafbState {
SysBusDevice parent_obj;

4
hw/display/next-fb.c
View File

@ -32,9 +32,7 @@
#include "hw/m68k/next-cube.h"
#include "qom/object.h"
typedef struct NeXTFbState NeXTFbState;
DECLARE_INSTANCE_CHECKER(NeXTFbState, NEXTFB,
TYPE_NEXTFB)
OBJECT_DECLARE_SIMPLE_TYPE(NeXTFbState, NEXTFB)
struct NeXTFbState {
SysBusDevice parent_obj;

4
hw/display/pl110.c
View File

@ -49,9 +49,7 @@ enum pl110_version
};
#define TYPE_PL110 "pl110"
typedef struct PL110State PL110State;
DECLARE_INSTANCE_CHECKER(PL110State, PL110,
TYPE_PL110)
OBJECT_DECLARE_SIMPLE_TYPE(PL110State, PL110)
struct PL110State {
SysBusDevice parent_obj;

4
hw/display/qxl.h
View File

@ -128,11 +128,9 @@ struct PCIQXLDevice {
QXLRect dirty[QXL_NUM_DIRTY_RECTS];
QEMUBH *update_area_bh;
};
typedef struct PCIQXLDevice PCIQXLDevice;
#define TYPE_PCI_QXL "pci-qxl"
DECLARE_INSTANCE_CHECKER(PCIQXLDevice, PCI_QXL,
TYPE_PCI_QXL)
OBJECT_DECLARE_SIMPLE_TYPE(PCIQXLDevice, PCI_QXL)
#define PANIC_ON(x) if ((x)) { \
printf("%s: PANIC %s failed\n", __func__, #x); \

4
hw/display/sii9022.c
View File

@ -36,9 +36,7 @@
#define SII9022_INT_STATUS_PLUGGED 0x04;
#define TYPE_SII9022 "sii9022"
typedef struct sii9022_state sii9022_state;
DECLARE_INSTANCE_CHECKER(sii9022_state, SII9022,
TYPE_SII9022)
OBJECT_DECLARE_SIMPLE_TYPE(sii9022_state, SII9022)
struct sii9022_state {
I2CSlave parent_obj;

8
hw/display/sm501.c
View File

@ -1932,9 +1932,7 @@ static const VMStateDescription vmstate_sm501_state = {
};
#define TYPE_SYSBUS_SM501 "sysbus-sm501"
typedef struct SM501SysBusState SM501SysBusState;
DECLARE_INSTANCE_CHECKER(SM501SysBusState, SYSBUS_SM501,
TYPE_SYSBUS_SM501)
OBJECT_DECLARE_SIMPLE_TYPE(SM501SysBusState, SYSBUS_SM501)
struct SM501SysBusState {
/*< private >*/
@ -2036,9 +2034,7 @@ static const TypeInfo sm501_sysbus_info = {
};
#define TYPE_PCI_SM501 "sm501"
typedef struct SM501PCIState SM501PCIState;
DECLARE_INSTANCE_CHECKER(SM501PCIState, PCI_SM501,
TYPE_PCI_SM501)
OBJECT_DECLARE_SIMPLE_TYPE(SM501PCIState, PCI_SM501)
struct SM501PCIState {
/*< private >*/

4
hw/display/ssd0303.c
View File

@ -47,9 +47,7 @@ enum ssd0303_cmd {
};
#define TYPE_SSD0303 "ssd0303"
typedef struct ssd0303_state ssd0303_state;
DECLARE_INSTANCE_CHECKER(ssd0303_state, SSD0303,
TYPE_SSD0303)
OBJECT_DECLARE_SIMPLE_TYPE(ssd0303_state, SSD0303)
struct ssd0303_state {
I2CSlave parent_obj;

4
hw/display/ssd0323.c
View File

@ -66,11 +66,9 @@ struct ssd0323_state {
uint32_t mode;
uint8_t framebuffer[128 * 80 / 2];
};
typedef struct ssd0323_state ssd0323_state;
#define TYPE_SSD0323 "ssd0323"
DECLARE_INSTANCE_CHECKER(ssd0323_state, SSD0323,
TYPE_SSD0323)
OBJECT_DECLARE_SIMPLE_TYPE(ssd0323_state, SSD0323)
static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)

4
hw/display/tcx.c
View File

@ -56,9 +56,7 @@
#define TCX_THC_CURSBITS 0x980
#define TYPE_TCX "SUNW,tcx"
typedef struct TCXState TCXState;
DECLARE_INSTANCE_CHECKER(TCXState, TCX,
TYPE_TCX)
OBJECT_DECLARE_SIMPLE_TYPE(TCXState, TCX)
struct TCXState {
SysBusDevice parent_obj;

4
hw/display/vga-isa.c
View File

@ -35,9 +35,7 @@
#include "qom/object.h"
#define TYPE_ISA_VGA "isa-vga"
typedef struct ISAVGAState ISAVGAState;
DECLARE_INSTANCE_CHECKER(ISAVGAState, ISA_VGA,
TYPE_ISA_VGA)
OBJECT_DECLARE_SIMPLE_TYPE(ISAVGAState, ISA_VGA)
struct ISAVGAState {
ISADevice parent_obj;

4
hw/display/vga-pci.c
View File

@ -51,11 +51,9 @@ struct PCIVGAState {
MemoryRegion mrs[4];
uint8_t edid[256];
};
typedef struct PCIVGAState PCIVGAState;
#define TYPE_PCI_VGA "pci-vga"
DECLARE_INSTANCE_CHECKER(PCIVGAState, PCI_VGA,
TYPE_PCI_VGA)
OBJECT_DECLARE_SIMPLE_TYPE(PCIVGAState, PCI_VGA)
static const VMStateDescription vmstate_vga_pci = {
.name = "vga",

2
hw/display/virtio-vga.h
View File

@ -10,7 +10,7 @@
*/
#define TYPE_VIRTIO_VGA_BASE "virtio-vga-base"
OBJECT_DECLARE_TYPE(VirtIOVGABase, VirtIOVGABaseClass,
virtio_vga_base, VIRTIO_VGA_BASE)
VIRTIO_VGA_BASE)
struct VirtIOVGABase {
VirtIOPCIProxy parent_obj;

4
hw/dma/i82374.c
View File

@ -32,9 +32,7 @@
#include "qom/object.h"
#define TYPE_I82374 "i82374"
typedef struct I82374State I82374State;
DECLARE_INSTANCE_CHECKER(I82374State, I82374,
TYPE_I82374)
OBJECT_DECLARE_SIMPLE_TYPE(I82374State, I82374)
//#define DEBUG_I82374

3
hw/dma/pl330.c
View File

@ -272,8 +272,7 @@ struct PL330State {
};
#define TYPE_PL330 "pl330"
DECLARE_INSTANCE_CHECKER(PL330State, PL330,
TYPE_PL330)
OBJECT_DECLARE_SIMPLE_TYPE(PL330State, PL330)
static const VMStateDescription vmstate_pl330 = {
.name = "pl330",

4
hw/dma/puv3_dma.c
View File

@ -23,9 +23,7 @@
#define PUV3_DMA_CH(offset) ((offset) >> 8)
#define TYPE_PUV3_DMA "puv3_dma"
typedef struct PUV3DMAState PUV3DMAState;
DECLARE_INSTANCE_CHECKER(PUV3DMAState, PUV3_DMA,
TYPE_PUV3_DMA)
OBJECT_DECLARE_SIMPLE_TYPE(PUV3DMAState, PUV3_DMA)
struct PUV3DMAState {
SysBusDevice parent_obj;

4
hw/dma/pxa2xx_dma.c
View File

@ -35,9 +35,7 @@ typedef struct {
} PXA2xxDMAChannel;
#define TYPE_PXA2XX_DMA "pxa2xx-dma"
typedef struct PXA2xxDMAState PXA2xxDMAState;
DECLARE_INSTANCE_CHECKER(PXA2xxDMAState, PXA2XX_DMA,
TYPE_PXA2XX_DMA)
OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxDMAState, PXA2XX_DMA)
struct PXA2xxDMAState {
SysBusDevice parent_obj;

4
hw/dma/rc4030.c
View File

@ -56,9 +56,7 @@ typedef struct dma_pagetable_entry {
#define DMA_FLAG_ADDR_INTR 0x0400
#define TYPE_RC4030 "rc4030"
typedef struct rc4030State rc4030State;
DECLARE_INSTANCE_CHECKER(rc4030State, RC4030,
TYPE_RC4030)
OBJECT_DECLARE_SIMPLE_TYPE(rc4030State, RC4030)
#define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region"

4
hw/dma/xilinx_axidma.c
View File

@ -43,9 +43,7 @@
#define TYPE_XILINX_AXI_DMA_DATA_STREAM "xilinx-axi-dma-data-stream"
#define TYPE_XILINX_AXI_DMA_CONTROL_STREAM "xilinx-axi-dma-control-stream"
typedef struct XilinxAXIDMA XilinxAXIDMA;
DECLARE_INSTANCE_CHECKER(XilinxAXIDMA, XILINX_AXI_DMA,
TYPE_XILINX_AXI_DMA)
OBJECT_DECLARE_SIMPLE_TYPE(XilinxAXIDMA, XILINX_AXI_DMA)
typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave;
DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_DATA_STREAM,

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