i8254: Factor out pit_get_channel_info
Instead of providing 4 individual query functions for mode, gate, output and initial counter state, introduce a service that queries all information at once. This comes with tiny additional costs for pcspk_callback but with a much cleaner interface. Also, it will simplify the implementation of the KVM in-kernel PIT model. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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302fe51b59
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35
hw/i8254.c
35
hw/i8254.c
@ -90,7 +90,7 @@ static int pit_get_count(PITChannelState *s)
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}
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/* get pit output bit */
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static int pit_get_out1(PITChannelState *s, int64_t current_time)
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static int pit_get_out(PITChannelState *s, int64_t current_time)
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{
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uint64_t d;
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int out;
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@ -122,13 +122,6 @@ static int pit_get_out1(PITChannelState *s, int64_t current_time)
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return out;
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}
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int pit_get_out(ISADevice *dev, int channel, int64_t current_time)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return pit_get_out1(s, current_time);
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}
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/* return -1 if no transition will occur. */
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static int64_t pit_get_next_transition_time(PITChannelState *s,
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int64_t current_time)
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@ -215,25 +208,15 @@ void pit_set_gate(ISADevice *dev, int channel, int val)
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s->gate = val;
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}
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int pit_get_gate(ISADevice *dev, int channel)
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void pit_get_channel_info(ISADevice *dev, int channel, PITChannelInfo *info)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return s->gate;
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}
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int pit_get_initial_count(ISADevice *dev, int channel)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return s->count;
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}
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int pit_get_mode(ISADevice *dev, int channel)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return s->mode;
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info->gate = s->gate;
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info->mode = s->mode;
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info->initial_count = s->count;
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info->out = pit_get_out(s, qemu_get_clock_ns(vm_clock));
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}
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static inline void pit_load_count(PITChannelState *s, int val)
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@ -274,7 +257,9 @@ static void pit_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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if (!(val & 0x10) && !s->status_latched) {
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/* status latch */
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/* XXX: add BCD and null count */
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s->status = (pit_get_out1(s, qemu_get_clock_ns(vm_clock)) << 7) |
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s->status =
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(pit_get_out(s,
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qemu_get_clock_ns(vm_clock)) << 7) |
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(s->rw_mode << 4) |
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(s->mode << 1) |
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s->bcd;
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@ -381,7 +366,7 @@ static void pit_irq_timer_update(PITChannelState *s, int64_t current_time)
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return;
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}
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expire_time = pit_get_next_transition_time(s, current_time);
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irq_level = pit_get_out1(s, current_time);
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irq_level = pit_get_out(s, current_time);
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qemu_set_irq(s->irq, irq_level);
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#ifdef DEBUG_PIT
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printf("irq_level=%d next_delay=%f\n",
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12
hw/i8254.h
12
hw/i8254.h
@ -30,6 +30,13 @@
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#define PIT_FREQ 1193182
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typedef struct PITChannelInfo {
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int gate;
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int mode;
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int initial_count;
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int out;
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} PITChannelInfo;
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static inline ISADevice *pit_init(ISABus *bus, int base, int isa_irq,
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qemu_irq alt_irq)
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{
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@ -45,9 +52,6 @@ static inline ISADevice *pit_init(ISABus *bus, int base, int isa_irq,
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}
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void pit_set_gate(ISADevice *dev, int channel, int val);
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int pit_get_gate(ISADevice *dev, int channel);
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int pit_get_initial_count(ISADevice *dev, int channel);
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int pit_get_mode(ISADevice *dev, int channel);
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int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
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void pit_get_channel_info(ISADevice *dev, int channel, PITChannelInfo *info);
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#endif /* !HW_I8254_H */
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18
hw/pcspk.c
18
hw/pcspk.c
@ -75,12 +75,16 @@ static inline void generate_samples(PCSpkState *s)
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static void pcspk_callback(void *opaque, int free)
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{
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PCSpkState *s = opaque;
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PITChannelInfo ch;
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unsigned int n;
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if (pit_get_mode(s->pit, 2) != 3)
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return;
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pit_get_channel_info(s->pit, 2, &ch);
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n = pit_get_initial_count(s->pit, 2);
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if (ch.mode != 3) {
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return;
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}
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n = ch.initial_count;
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/* avoid frequencies that are not reproducible with sample rate */
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if (n < PCSPK_MIN_COUNT)
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n = 0;
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@ -121,12 +125,14 @@ static uint64_t pcspk_io_read(void *opaque, target_phys_addr_t addr,
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unsigned size)
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{
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PCSpkState *s = opaque;
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int out;
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PITChannelInfo ch;
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pit_get_channel_info(s->pit, 2, &ch);
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s->dummy_refresh_clock ^= (1 << 4);
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out = pit_get_out(s->pit, 2, qemu_get_clock_ns(vm_clock)) << 5;
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return pit_get_gate(s->pit, 2) | (s->data_on << 1) | s->dummy_refresh_clock | out;
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return ch.gate | (s->data_on << 1) | s->dummy_refresh_clock |
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(ch.out << 5);
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}
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static void pcspk_io_write(void *opaque, target_phys_addr_t addr, uint64_t val,
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