target-i386: Implement SHLX, SARX, SHRX
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -4174,6 +4174,37 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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gen_helper_pext(cpu_regs[reg], cpu_T[0], cpu_T[1]);
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break;
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case 0x1f7: /* shlx Gy, Ey, By */
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case 0x2f7: /* sarx Gy, Ey, By */
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case 0x3f7: /* shrx Gy, Ey, By */
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if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI2)
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|| !(s->prefix & PREFIX_VEX)
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|| s->vex_l != 0) {
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goto illegal_op;
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}
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ot = (s->dflag == 2 ? OT_QUAD : OT_LONG);
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gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
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if (ot == OT_QUAD) {
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tcg_gen_andi_tl(cpu_T[1], cpu_regs[s->vex_v], 63);
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} else {
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tcg_gen_andi_tl(cpu_T[1], cpu_regs[s->vex_v], 31);
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}
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if (b == 0x1f7) {
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tcg_gen_shl_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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} else if (b == 0x2f7) {
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if (ot != OT_QUAD) {
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tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]);
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}
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tcg_gen_sar_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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} else {
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if (ot != OT_QUAD) {
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tcg_gen_ext32u_tl(cpu_T[0], cpu_T[0]);
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}
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tcg_gen_shr_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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}
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gen_op_mov_reg_T0(ot, reg);
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break;
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case 0x0f3:
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case 0x1f3:
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case 0x2f3:
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