target/arm: Handle overflow in calculation of next timer tick
In commitedac4d8a16
back in 2015 when we added support for the virtual timer offset CNTVOFF_EL2, we didn't correctly update the timer-recalculation code that figures out when the timer interrupt is next going to change state. We got it wrong in two ways: * for the 0->1 transition, we didn't notice that gt->cval + offset can overflow a uint64_t * for the 1->0 transition, we didn't notice that the transition might now happen before the count rolls over, if offset > count In the former case, we end up trying to set the next interrupt for a time in the past, which results in QEMU hanging as the timer fires continuously. In the latter case, we would fail to update the interrupt status when we are supposed to. Fix the calculations in both cases. The test case is Alex Bennée's from the bug report, and tests the 0->1 transition overflow case. Fixes:edac4d8a16
("target-arm: Add CNTVOFF_EL2") Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/60 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120173506.3729884-1-peter.maydell@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> (cherry picked from commit8d37a1425b
) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -2616,11 +2616,28 @@ static void gt_recalc_timer(ARMCPU *cpu, int timeridx)
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qemu_set_irq(cpu->gt_timer_outputs[timeridx], irqstate);
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if (istatus) {
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/* Next transition is when count rolls back over to zero */
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nexttick = UINT64_MAX;
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/*
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* Next transition is when (count - offset) rolls back over to 0.
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* If offset > count then this is when count == offset;
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* if offset <= count then this is when count == offset + 2^64
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* For the latter case we set nexttick to an "as far in future
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* as possible" value and let the code below handle it.
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*/
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if (offset > count) {
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nexttick = offset;
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} else {
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/* Next transition is when we hit cval */
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nexttick = gt->cval + offset;
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nexttick = UINT64_MAX;
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}
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} else {
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/*
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* Next transition is when (count - offset) == cval, i.e.
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* when count == (cval + offset).
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* If that would overflow, then again we set up the next interrupt
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* for "as far in the future as possible" for the code below.
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*/
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if (uadd64_overflow(gt->cval, offset, &nexttick)) {
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nexttick = UINT64_MAX;
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}
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}
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/*
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* Note that the desired next expiry time might be beyond the
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@ -45,7 +45,8 @@ TESTS+=memory-sve
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# Running
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QEMU_BASE_MACHINE=-M virt -cpu max -display none
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QEMU_OPTS+=$(QEMU_BASE_MACHINE) -semihosting-config enable=on,target=native,chardev=output -kernel
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QEMU_BASE_ARGS=-semihosting-config enable=on,target=native,chardev=output
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QEMU_OPTS+=$(QEMU_BASE_MACHINE) $(QEMU_BASE_ARGS) -kernel
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# console test is manual only
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QEMU_SEMIHOST=-chardev stdio,mux=on,id=stdio0 -semihosting-config enable=on,chardev=stdio0 -mon chardev=stdio0,mode=readline
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@ -55,6 +56,10 @@ run-semiconsole: semiconsole
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run-plugin-semiconsole-with-%: semiconsole
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$(call skip-test, $<, "MANUAL ONLY")
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# vtimer test needs EL2
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QEMU_EL2_MACHINE=-machine virt,virtualization=on,gic-version=2 -cpu cortex-a57 -smp 4
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run-vtimer: QEMU_OPTS=$(QEMU_EL2_MACHINE) $(QEMU_BASE_ARGS) -kernel
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# Simple Record/Replay Test
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.PHONY: memory-record
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run-memory-record: memory-record memory
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48
tests/tcg/aarch64/system/vtimer.c
Normal file
48
tests/tcg/aarch64/system/vtimer.c
Normal file
@ -0,0 +1,48 @@
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/*
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* Simple Virtual Timer Test
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*
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* Copyright (c) 2020 Linaro Ltd
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include <inttypes.h>
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#include <minilib.h>
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/* grabbed from Linux */
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#define __stringify_1(x...) #x
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#define __stringify(x...) __stringify_1(x)
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#define read_sysreg(r) ({ \
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uint64_t __val; \
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asm volatile("mrs %0, " __stringify(r) : "=r" (__val)); \
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__val; \
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})
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#define write_sysreg(r, v) do { \
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uint64_t __val = (uint64_t)(v); \
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asm volatile("msr " __stringify(r) ", %x0" \
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: : "rZ" (__val)); \
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} while (0)
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int main(void)
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{
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int i;
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ml_printf("VTimer Test\n");
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write_sysreg(cntvoff_el2, 1);
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write_sysreg(cntv_cval_el0, -1);
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write_sysreg(cntv_ctl_el0, 1);
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ml_printf("cntvoff_el2=%lx\n", read_sysreg(cntvoff_el2));
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ml_printf("cntv_cval_el0=%lx\n", read_sysreg(cntv_cval_el0));
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ml_printf("cntv_ctl_el0=%lx\n", read_sysreg(cntv_ctl_el0));
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/* Now read cval a few times */
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for (i = 0; i < 10; i++) {
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ml_printf("%d: cntv_cval_el0=%lx\n", i, read_sysreg(cntv_cval_el0));
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}
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return 0;
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}
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