hw/block/nvme: validate command set selected
Fail to start the controller if the user requests a command set that the controller does not support. Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
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@ -2045,6 +2045,10 @@ static int nvme_start_ctrl(NvmeCtrl *n)
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trace_pci_nvme_err_startfail_acq_misaligned(n->bar.acq);
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return -1;
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}
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if (unlikely(!(NVME_CAP_CSS(n->bar.cap) & (1 << NVME_CC_CSS(n->bar.cc))))) {
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trace_pci_nvme_err_startfail_css(NVME_CC_CSS(n->bar.cc));
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return -1;
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}
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if (unlikely(NVME_CC_MPS(n->bar.cc) <
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NVME_CAP_MPSMIN(n->bar.cap))) {
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trace_pci_nvme_err_startfail_page_too_small(
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@ -2746,7 +2750,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
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NVME_CAP_SET_MQES(n->bar.cap, 0x7ff);
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NVME_CAP_SET_CQR(n->bar.cap, 1);
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NVME_CAP_SET_TO(n->bar.cap, 0xf);
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NVME_CAP_SET_CSS(n->bar.cap, 1);
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NVME_CAP_SET_CSS(n->bar.cap, NVME_CAP_CSS_NVM);
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NVME_CAP_SET_MPSMAX(n->bar.cap, 4);
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n->bar.vs = NVME_SPEC_VER;
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@ -132,6 +132,7 @@ pci_nvme_err_startfail_cqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) "nvme_
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pci_nvme_err_startfail_cqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the completion queue entry size is too large: log2size=%u, max=%u"
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pci_nvme_err_startfail_sqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the submission queue entry size is too small: log2size=%u, min=%u"
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pci_nvme_err_startfail_sqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the submission queue entry size is too large: log2size=%u, max=%u"
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pci_nvme_err_startfail_css(uint8_t css) "nvme_start_ctrl failed because invalid command set selected:%u"
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pci_nvme_err_startfail_asqent_sz_zero(void) "nvme_start_ctrl failed because the admin submission queue size is zero"
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pci_nvme_err_startfail_acqent_sz_zero(void) "nvme_start_ctrl failed because the admin completion queue size is zero"
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pci_nvme_err_startfail(void) "setting controller enable bit failed"
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@ -82,6 +82,10 @@ enum NvmeCapMask {
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#define NVME_CAP_SET_PMRS(cap, val) (cap |= (uint64_t)(val & CAP_PMR_MASK)\
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<< CAP_PMR_SHIFT)
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enum NvmeCapCss {
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NVME_CAP_CSS_NVM = 1 << 0,
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};
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enum NvmeCcShift {
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CC_EN_SHIFT = 0,
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CC_CSS_SHIFT = 4,
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