m68k pull-request 20200706
disable floatx80_invalid_encoding() for m68k fix m68k_cpu_get_phys_page_debug() -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl8DhA0SHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748kn8QAJkOBWOP/CgzyB/uaPE44kLVcNBLDo9Q umB1JHhrchwTd/QtlTjp5dty4NgQsSfCE1dsgCKhv+vP73IGZW83ziXXnSiO5Ant wfXvzppT93yZ01dk0a+/HvHhWeYxDOhdqZ95AZZTiVEPnT6L+dneNN4Vz1Ri5CSw nW8AYmPGoGLQp0rcANHwXLm40pET5VzYmvf8rrzCYpCpYy3pIeKIbGJkPqh+XCXW ugZgQtXoKAcHPtHa0wO57ysC1t5S1O5K772AlDss25my/McG+QySHST/xCORch42 v4HvYlAn/MiyoRw+noz8DXGn0gr+MeZYGbn1nmimB/xjB8fvIFn+7rhGtUa0miBF ewA9eLOuikzCw7I5SHtSOseDkZci9DJKcIXL+jIQLfBZbFSLXrmxgG9oVOYdm+FL 6Wq2Hpd3H4TRNvuOHeZkxUJ4+SUnEZ7P9IFl4cG2euq5qUK9GQ1oG2Msi+Au5nTq Nin6FYj5qKXn1vjLzUiTz4DOjpIN1HyB0EvzOrjR+eI/KmMFZY7h3EoeUwPeymrV QR2N+hU/l1e+VZBSBnpdgUu32162DrmLBcvGBg5Cxb4bdnEqvKINAVez4pkh+7yj WxXG4jOCfBeJWIJ7yLAaZRdTZ/RSs1kO6Ksnr+Y4tAFkkbXqJPCwHM6nTEt13X1d BIT0s1TJ+DvX =JAxe -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' into staging m68k pull-request 20200706 disable floatx80_invalid_encoding() for m68k fix m68k_cpu_get_phys_page_debug() # gpg: Signature made Mon 06 Jul 2020 21:05:33 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-next-pull-request: softfloat,m68k: disable floatx80_invalid_encoding() for m68k target/m68k: consolidate physical translation offset into get_physical_address() target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
48f22ad04e
@ -794,7 +794,31 @@ static inline bool floatx80_unordered_quiet(floatx80 a, floatx80 b,
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*----------------------------------------------------------------------------*/
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static inline bool floatx80_invalid_encoding(floatx80 a)
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{
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#if defined(TARGET_M68K)
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/*-------------------------------------------------------------------------
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| With m68k, the explicit integer bit can be zero in the case of:
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| - zeros (exp == 0, mantissa == 0)
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| - denormalized numbers (exp == 0, mantissa != 0)
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| - unnormalized numbers (exp != 0, exp < 0x7FFF)
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| - infinities (exp == 0x7FFF, mantissa == 0)
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| - not-a-numbers (exp == 0x7FFF, mantissa != 0)
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| For infinities and NaNs, the explicit integer bit can be either one or
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| zero.
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| The IEEE 754 standard does not define a zero integer bit. Such a number
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| is an unnormalized number. Hardware does not directly support
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| denormalized and unnormalized numbers, but implicitly supports them by
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| trapping them as unimplemented data types, allowing efficient conversion
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| in software.
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| See "M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL",
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| "1.6 FLOATING-POINT DATA TYPES"
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*------------------------------------------------------------------------*/
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return false;
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#else
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return (a.low & (1ULL << 63)) == 0 && (a.high & 0x7FFF) != 0;
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#endif
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}
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#define floatx80_zero make_floatx80(0x0000, 0x0000000000000000LL)
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@ -643,7 +643,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
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/* Transparent Translation Register bit */
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env->mmu.mmusr = M68K_MMU_T_040 | M68K_MMU_R_040;
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}
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*physical = address & TARGET_PAGE_MASK;
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*physical = address;
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*page_size = TARGET_PAGE_SIZE;
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return 0;
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}
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@ -771,7 +771,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
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}
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*page_size = 1 << page_bits;
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page_mask = ~(*page_size - 1);
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*physical = next & page_mask;
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*physical = (next & page_mask) + (address & (*page_size - 1));
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if (access_type & ACCESS_PTEST) {
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env->mmu.mmusr |= next & M68K_MMU_SR_MASK_040;
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@ -820,10 +820,12 @@ hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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if (env->sr & SR_S) {
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access_type |= ACCESS_SUPER;
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}
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if (get_physical_address(env, &phys_addr, &prot,
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addr, access_type, &page_size) != 0) {
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return -1;
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}
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return phys_addr;
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}
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@ -887,10 +889,8 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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ret = get_physical_address(&cpu->env, &physical, &prot,
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address, access_type, &page_size);
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if (likely(ret == 0)) {
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address &= TARGET_PAGE_MASK;
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physical += address & (page_size - 1);
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tlb_set_page(cs, address, physical,
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prot, mmu_idx, TARGET_PAGE_SIZE);
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tlb_set_page(cs, address & TARGET_PAGE_MASK,
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physical & TARGET_PAGE_MASK, prot, mmu_idx, page_size);
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return true;
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}
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@ -1379,9 +1379,8 @@ void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
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ret = get_physical_address(env, &physical, &prot, addr,
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access_type, &page_size);
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if (ret == 0) {
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addr &= TARGET_PAGE_MASK;
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physical += addr & (page_size - 1);
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tlb_set_page(env_cpu(env), addr, physical,
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tlb_set_page(env_cpu(env), addr & TARGET_PAGE_MASK,
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physical & TARGET_PAGE_MASK,
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prot, access_type & ACCESS_SUPER ?
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MMU_KERNEL_IDX : MMU_USER_IDX, page_size);
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}
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