igb: Add more definitions for Tx descriptor
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
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@ -418,7 +418,7 @@ igb_setup_tx_offloads(IGBCore *core, struct igb_tx *tx)
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{
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if (tx->first_cmd_type_len & E1000_ADVTXD_DCMD_TSE) {
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uint32_t idx = (tx->first_olinfo_status >> 4) & 1;
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uint32_t mss = tx->ctx[idx].mss_l4len_idx >> 16;
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uint32_t mss = tx->ctx[idx].mss_l4len_idx >> E1000_ADVTXD_MSS_SHIFT;
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if (!net_tx_pkt_build_vheader(tx->tx_pkt, true, true, mss)) {
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return false;
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}
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@ -612,7 +612,7 @@ igb_process_tx_desc(IGBCore *core,
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if (!tx->skip_cp && net_tx_pkt_parse(tx->tx_pkt)) {
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idx = (tx->first_olinfo_status >> 4) & 1;
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igb_tx_insert_vlan(core, queue_index, tx,
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tx->ctx[idx].vlan_macip_lens >> 16,
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tx->ctx[idx].vlan_macip_lens >> IGB_TX_FLAGS_VLAN_SHIFT,
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!!(tx->first_cmd_type_len & E1000_TXD_CMD_VLE));
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if (igb_tx_pkt_send(core, tx, queue_index)) {
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@ -42,11 +42,6 @@ union e1000_adv_tx_desc {
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} wb;
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};
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#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
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#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
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#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor Extension (1=Adv) */
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#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP/UDP Segmentation Enable */
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#define E1000_ADVTXD_POTS_IXSM 0x00000100 /* Insert TCP/UDP Checksum */
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#define E1000_ADVTXD_POTS_TXSM 0x00000200 /* Insert TCP/UDP Checksum */
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@ -151,6 +146,10 @@ union e1000_adv_rx_desc {
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#define IGB_82576_VF_DEV_ID 0x10CA
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#define IGB_I350_VF_DEV_ID 0x1520
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/* VLAN info */
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#define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
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#define IGB_TX_FLAGS_VLAN_SHIFT 16
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/* from igb/e1000_82575.h */
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#define E1000_MRQC_ENABLE_RSS_MQ 0x00000002
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@ -160,6 +159,29 @@ union e1000_adv_rx_desc {
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#define E1000_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
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#define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000
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/* Adv Transmit Descriptor Config Masks */
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#define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp packet */
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#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
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#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
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#define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
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#define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
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#define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
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#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */
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#define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
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#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
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#define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */
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#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */
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#define E1000_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE of UDP */
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#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */
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#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */
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#define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 packet TYPE of SCTP */
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/* IPSec Encrypt Enable for ESP */
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#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */
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#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */
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/* Adv ctxt IPSec SA IDX mask */
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/* Adv ctxt IPSec ESP len mask */
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/* Additional Transmit Descriptor Control definitions */
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#define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Tx Queue */
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