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added PCI bus

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@961 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2004-06-21 19:43:00 +00:00
parent 7c29d0c0cf
commit 46e50e9d58
9 changed files with 70 additions and 64 deletions
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6
hw/cirrus_vga.c
View File

@ -2891,7 +2891,7 @@ static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
s->cirrus_mmio_io_addr);
}
void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size)
{
PCICirrusVGAState *d;
@ -2902,9 +2902,9 @@ void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
device_id = CIRRUS_ID_CLGD5446;
/* setup PCI configuration registers */
d = (PCICirrusVGAState *)pci_register_device("Cirrus VGA",
d = (PCICirrusVGAState *)pci_register_device(bus, "Cirrus VGA",
sizeof(PCICirrusVGAState),
0, -1, NULL, NULL);
-1, NULL, NULL);
pci_conf = d->dev.config;
pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff);
pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8);

13
hw/ide.c
View File

@ -1579,14 +1579,14 @@ static void ide_map(PCIDevice *pci_dev, int region_num,
}
/* hd_table must contain 4 block drivers */
void pci_ide_init(BlockDriverState **hd_table)
void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
{
PCIIDEState *d;
uint8_t *pci_conf;
int i;
d = (PCIIDEState *)pci_register_device("IDE", sizeof(PCIIDEState),
0, -1,
d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
-1,
NULL, NULL);
pci_conf = d->dev.config;
pci_conf[0x00] = 0x86; // Intel
@ -1621,14 +1621,15 @@ void pci_ide_init(BlockDriverState **hd_table)
/* hd_table must contain 4 block drivers */
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
void pci_piix3_ide_init(BlockDriverState **hd_table)
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
{
PCIIDEState *d;
uint8_t *pci_conf;
/* register a function 1 of PIIX3 */
d = (PCIIDEState *)pci_register_device("PIIX3 IDE", sizeof(PCIIDEState),
0, ((PCIDevice *)piix3_state)->devfn + 1,
d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
sizeof(PCIIDEState),
((PCIDevice *)piix3_state)->devfn + 1,
NULL, NULL);
pci_conf = d->dev.config;
pci_conf[0x00] = 0x86; // Intel

7
hw/ne2000.c
View File

@ -613,14 +613,15 @@ static void ne2000_map(PCIDevice *pci_dev, int region_num,
register_ioport_read(addr + 0x1f, 1, 1, ne2000_reset_ioport_read, s);
}
void pci_ne2000_init(NetDriverState *nd)
void pci_ne2000_init(PCIBus *bus, NetDriverState *nd)
{
PCINE2000State *d;
NE2000State *s;
uint8_t *pci_conf;
d = (PCINE2000State *)pci_register_device("NE2000", sizeof(PCINE2000State),
0, -1,
d = (PCINE2000State *)pci_register_device(bus,
"NE2000", sizeof(PCINE2000State),
-1,
NULL, NULL);
pci_conf = d->dev.config;
pci_conf[0x00] = 0xec; // Realtek 8029

7
hw/openpic.c
View File

@ -964,7 +964,8 @@ static void openpic_map(PCIDevice *pci_dev, int region_num,
#endif
}
openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
openpic_t *openpic_init (PCIBus *bus,
uint32_t isu_base, uint32_t idu_base, int nb_cpus)
{
openpic_t *opp;
uint8_t *pci_conf;
@ -973,8 +974,8 @@ openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
/* XXX: for now, only one CPU is supported */
if (nb_cpus != 1)
return NULL;
opp = (openpic_t *)pci_register_device("OpenPIC", sizeof(openpic_t),
0, -1, NULL, NULL);
opp = (openpic_t *)pci_register_device(bus, "OpenPIC", sizeof(openpic_t),
-1, NULL, NULL);
if (opp == NULL)
return NULL;
pci_conf = opp->pci_dev.config;

20
hw/pc.c
View File

@ -324,7 +324,8 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
int ret, linux_boot, initrd_size, i, nb_nics1, fd;
unsigned long bios_offset, vga_bios_offset;
int bios_size, isa_bios_size;
PCIBus *pci_bus;
linux_boot = (kernel_filename != NULL);
/* allocate RAM */
@ -432,8 +433,10 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
}
if (pci_enabled) {
i440fx_init();
piix3_init();
pci_bus = i440fx_init();
piix3_init(pci_bus);
} else {
pci_bus = NULL;
}
/* init basic PC hardware */
@ -443,15 +446,16 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
if (cirrus_vga_enabled) {
if (pci_enabled) {
pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
pci_cirrus_vga_init(pci_bus,
ds, phys_ram_base + ram_size, ram_size,
vga_ram_size);
} else {
isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
vga_ram_size);
}
} else {
vga_initialize(ds, phys_ram_base + ram_size, ram_size,
vga_ram_size, pci_enabled);
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
vga_ram_size);
}
rtc_state = rtc_init(0x70, 8);
@ -469,9 +473,9 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
if (pci_enabled) {
for(i = 0; i < nb_nics; i++) {
pci_ne2000_init(&nd_table[i]);
pci_ne2000_init(pci_bus, &nd_table[i]);
}
pci_piix3_ide_init(bs_table);
pci_piix3_ide_init(pci_bus, bs_table);
} else {
nb_nics1 = nb_nics;
if (nb_nics1 > NE2000_NB_MAX)

25
hw/ppc_chrp.c
View File

@ -89,13 +89,12 @@ static void macio_map(PCIDevice *pci_dev, int region_num,
cpu_register_physical_memory(addr + 0x20000, 0x1000, ide1_mem_index);
}
static void macio_init(void)
static void macio_init(PCIBus *bus)
{
PCIDevice *d;
d = pci_register_device("macio", sizeof(PCIDevice),
0, -1,
NULL, NULL);
d = pci_register_device(bus, "macio", sizeof(PCIDevice),
-1, NULL, NULL);
/* Note: this code is strongly inspirated from the corresponding code
in PearPC */
d->config[0x00] = 0x6b; // vendor_id
@ -128,7 +127,8 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
int ret, linux_boot, i, fd;
unsigned long bios_offset;
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
PCIBus *pci_bus;
linux_boot = (kernel_filename != NULL);
/* allocate RAM */
@ -182,17 +182,18 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
isa_mem_base = 0x80000000;
pci_pmac_init();
pci_bus = pci_pmac_init();
/* Register 8 MB of ISA IO space */
PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
cpu_register_physical_memory(0xF2000000, 0x00800000, PPC_io_memory);
/* init basic PC hardware */
vga_initialize(ds, phys_ram_base + ram_size, ram_size,
vga_ram_size, 1);
openpic = openpic_init(0x00000000, 0xF0000000, 1);
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
vga_ram_size);
openpic = openpic_init(pci_bus, 0x00000000, 0xF0000000, 1);
pci_pmac_set_openpic(pci_bus, openpic);
/* XXX: suppress that */
pic_init();
@ -201,7 +202,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
serial_init(0x3f8, 4, fd);
for(i = 0; i < nb_nics; i++) {
pci_ne2000_init(&nd_table[i]);
pci_ne2000_init(pci_bus, &nd_table[i]);
}
ide0_mem_index = pmac_ide_init(&bs_table[0], openpic, 0x13);
@ -213,7 +214,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
adb_kbd_init(&adb_bus);
adb_mouse_init(&adb_bus);
macio_init();
macio_init(pci_bus);
nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);

9
hw/ppc_prep.c
View File

@ -418,6 +418,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
int ret, linux_boot, i, nb_nics1, fd;
unsigned long bios_offset;
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
PCIBus *pci_bus;
sysctrl = qemu_mallocz(sizeof(sysctrl_t));
if (sysctrl == NULL)
@ -477,14 +478,14 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
isa_mem_base = 0xc0000000;
pci_prep_init();
pci_bus = pci_prep_init();
/* Register 64 KB of ISA IO space */
PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
cpu_register_physical_memory(0x80000000, 0x00010000, PPC_io_memory);
/* init basic PC hardware */
vga_initialize(ds, phys_ram_base + ram_size, ram_size,
vga_ram_size, 1);
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
vga_ram_size);
rtc_init(0x70, 8);
// openpic = openpic_init(0x00000000, 0xF0000000, 1);
// pic_init(openpic);
@ -545,6 +546,4 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
/* XXX: need an option to load a NVRAM image */
0,
graphic_width, graphic_height, graphic_depth);
pci_ppc_bios_init();
}

12
hw/vga.c
View File

@ -1747,9 +1747,8 @@ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
}
int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
int is_pci)
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size)
{
VGAState *s;
@ -1805,14 +1804,13 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000,
vga_io_memory);
if (is_pci) {
if (bus) {
PCIDevice *d;
uint8_t *pci_conf;
d = pci_register_device("VGA",
d = pci_register_device(bus, "VGA",
sizeof(PCIDevice),
0, -1,
NULL, NULL);
-1, NULL, NULL);
pci_conf = d->config;
pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID)
pci_conf[0x01] = 0x12;

35
vl.h
View File

@ -457,6 +457,7 @@ extern int pci_enabled;
extern target_phys_addr_t pci_mem_base;
typedef struct PCIBus PCIBus;
typedef struct PCIDevice PCIDevice;
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
@ -484,7 +485,7 @@ struct PCIDevice {
uint8_t config[256];
/* the following fields are read only */
int bus_num;
PCIBus *bus;
int devfn;
char name[64];
PCIIORegion io_regions[PCI_NUM_REGIONS];
@ -495,8 +496,8 @@ struct PCIDevice {
int irq_index;
};
PCIDevice *pci_register_device(const char *name, int instance_size,
int bus_num, int devfn,
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
int instance_size, int devfn,
PCIConfigReadFunc *config_read,
PCIConfigWriteFunc *config_write);
@ -513,20 +514,22 @@ void pci_default_write_config(PCIDevice *d,
extern struct PIIX3State *piix3_state;
void i440fx_init(void);
void piix3_init(void);
PCIBus *i440fx_init(void);
void piix3_init(PCIBus *bus);
void pci_bios_init(void);
void pci_info(void);
/* temporary: will be moved in platform specific file */
void pci_prep_init(void);
void pci_pmac_init(void);
void pci_ppc_bios_init(void);
PCIBus *pci_prep_init(void);
struct openpic_t;
void pci_pmac_set_openpic(PCIBus *bus, struct openpic_t *openpic);
PCIBus *pci_pmac_init(void);
/* openpic.c */
typedef struct openpic_t openpic_t;
void openpic_set_irq (openpic_t *opp, int n_IRQ, int level);
openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus);
openpic_t *openpic_init (PCIBus *bus,
uint32_t isu_base, uint32_t idu_base, int nb_cpus);
/* vga.c */
@ -551,17 +554,15 @@ static inline void dpy_resize(DisplayState *s, int w, int h)
s->dpy_resize(s, w, h);
}
int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
int is_pci);
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size);
void vga_update_display(void);
void vga_invalidate_display(void);
void vga_screen_dump(const char *filename);
/* cirrus_vga.c */
void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size);
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size);
@ -575,8 +576,8 @@ extern BlockDriverState *bs_table[MAX_DISKS];
void isa_ide_init(int iobase, int iobase2, int irq,
BlockDriverState *hd0, BlockDriverState *hd1);
void pci_ide_init(BlockDriverState **hd_table);
void pci_piix3_ide_init(BlockDriverState **hd_table);
void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table);
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
int pmac_ide_init (BlockDriverState **hd_table,
openpic_t *openpic, int irq);
@ -627,7 +628,7 @@ int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
/* ne2000.c */
void isa_ne2000_init(int base, int irq, NetDriverState *nd);
void pci_ne2000_init(NetDriverState *nd);
void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
/* pckbd.c */