hw/loongarch: Fix loongarch fdt addr confict

Fix LoongArch check-tcg error:
   TEST    hello on loongarch64
qemu-system-loongarch64: Some ROM regions are overlapping
These ROM regions might have been loaded by direct user request or by default.
They could be BIOS/firmware images, a guest kernel, initrd or some other file loaded into guest memory.
Check whether you intended to load all this guest code, and whether it has been built to load to the correct addresses.

The following two regions overlap (in the memory address space):
   hello ELF program header segment 0 (addresses 0x0000000000200000 - 0x0000000000242000)
   fdt (addresses 0x0000000000200000 - 0x0000000000300000)
make[1]: *** [Makefile:177: run-hello] Error 1

Fixes: 021836936e ("hw/loongarch: Load FDT table into dram memory space")
Reported-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221109020449.978064-1-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Song Gao 2022-11-09 10:04:49 +08:00 committed by Richard Henderson
parent 2ccad61746
commit 46b21de238

View File

@ -793,13 +793,13 @@ static void loongarch_init(MachineState *machine)
qemu_add_machine_init_done_notifier(&lams->machine_done);
fdt_add_pcie_node(lams);
/*
* Since lowmem region starts from 0, FDT base address is located
* at 2 MiB to avoid NULL pointer access.
*
* Since lowmem region starts from 0 and Linux kernel legacy start address
* at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
* access. FDT size limit with 1 MiB.
* Put the FDT into the memory map as a ROM image: this will ensure
* the FDT is copied again upon reset, even if addr points into RAM.
*/
fdt_base = 2 * MiB;
fdt_base = 1 * MiB;
qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
}