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hw/arm/smmuv3: Support nested SMMUs in smmuv3_notify_iova()

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IOMMUTLBEvent only understands IOVA, for stage-1 or stage-2
SMMU instances we consider the input address as the IOVA, but when
nesting is used, we can't mix stage-1 and stage-2 addresses, so for
nesting only stage-1 is considered the IOVA and would be notified.

Signed-off-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20240715084519.1189624-16-smostafa@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Mostafa Saleh 2024-07-15 08:45:15 +00:00 committed by Peter Maydell
parent b8fa4c233b
commit 4672772796
2 changed files with 26 additions and 15 deletions
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37
hw/arm/smmuv3.c
View File

@ -1096,27 +1096,38 @@ epilogue:
* @iova: iova * @iova: iova
* @tg: translation granule (if communicated through range invalidation) * @tg: translation granule (if communicated through range invalidation)
* @num_pages: number of @granule sized pages (if tg != 0), otherwise 1 * @num_pages: number of @granule sized pages (if tg != 0), otherwise 1
* @stage: Which stage(1 or 2) is used
*/ */
static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
IOMMUNotifier *n, IOMMUNotifier *n,
int asid, int vmid, int asid, int vmid,
dma_addr_t iova, uint8_t tg, dma_addr_t iova, uint8_t tg,
uint64_t num_pages) uint64_t num_pages, int stage)
{ {
SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu); SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu);
IOMMUTLBEvent event;
uint8_t granule;
SMMUv3State *s = sdev->smmu;
if (!tg) {
SMMUEventInfo eventinfo = {.inval_ste_allowed = true}; SMMUEventInfo eventinfo = {.inval_ste_allowed = true};
SMMUTransCfg *cfg = smmuv3_get_config(sdev, &eventinfo); SMMUTransCfg *cfg = smmuv3_get_config(sdev, &eventinfo);
SMMUTransTableInfo *tt; IOMMUTLBEvent event;
uint8_t granule;
if (!cfg) { if (!cfg) {
return; return;
} }
/*
* stage is passed from TLB invalidation commands which can be either
* stage-1 or stage-2.
* However, IOMMUTLBEvent only understands IOVA, for stage-1 or stage-2
* SMMU instances we consider the input address as the IOVA, but when
* nesting is used, we can't mix stage-1 and stage-2 addresses, so for
* nesting only stage-1 is considered the IOVA and would be notified.
*/
if ((stage == SMMU_STAGE_2) && (cfg->stage == SMMU_NESTED))
return;
if (!tg) {
SMMUTransTableInfo *tt;
if (asid >= 0 && cfg->asid != asid) { if (asid >= 0 && cfg->asid != asid) {
return; return;
} }
@ -1125,7 +1136,7 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
return; return;
} }
if (STAGE1_SUPPORTED(s)) { if (stage == SMMU_STAGE_1) {
tt = select_tt(cfg, iova); tt = select_tt(cfg, iova);
if (!tt) { if (!tt) {
return; return;
@ -1151,7 +1162,7 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
/* invalidate an asid/vmid/iova range tuple in all mr's */ /* invalidate an asid/vmid/iova range tuple in all mr's */
static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, int vmid, static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, int vmid,
dma_addr_t iova, uint8_t tg, dma_addr_t iova, uint8_t tg,
uint64_t num_pages) uint64_t num_pages, int stage)
{ {
SMMUDevice *sdev; SMMUDevice *sdev;
@ -1160,10 +1171,10 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, int vmid,
IOMMUNotifier *n; IOMMUNotifier *n;
trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, vmid, trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, vmid,
iova, tg, num_pages); iova, tg, num_pages, stage);
IOMMU_NOTIFIER_FOREACH(n, mr) { IOMMU_NOTIFIER_FOREACH(n, mr) {
smmuv3_notify_iova(mr, n, asid, vmid, iova, tg, num_pages); smmuv3_notify_iova(mr, n, asid, vmid, iova, tg, num_pages, stage);
} }
} }
} }
@ -1194,7 +1205,7 @@ static void smmuv3_range_inval(SMMUState *s, Cmd *cmd, SMMUStage stage)
if (!tg) { if (!tg) {
trace_smmuv3_range_inval(vmid, asid, addr, tg, 1, ttl, leaf, stage); trace_smmuv3_range_inval(vmid, asid, addr, tg, 1, ttl, leaf, stage);
smmuv3_inv_notifiers_iova(s, asid, vmid, addr, tg, 1); smmuv3_inv_notifiers_iova(s, asid, vmid, addr, tg, 1, stage);
if (stage == SMMU_STAGE_1) { if (stage == SMMU_STAGE_1) {
smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, 1, ttl); smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, 1, ttl);
} else { } else {
@ -1217,7 +1228,7 @@ static void smmuv3_range_inval(SMMUState *s, Cmd *cmd, SMMUStage stage)
num_pages = (mask + 1) >> granule; num_pages = (mask + 1) >> granule;
trace_smmuv3_range_inval(vmid, asid, addr, tg, num_pages, trace_smmuv3_range_inval(vmid, asid, addr, tg, num_pages,
ttl, leaf, stage); ttl, leaf, stage);
smmuv3_inv_notifiers_iova(s, asid, vmid, addr, tg, num_pages); smmuv3_inv_notifiers_iova(s, asid, vmid, addr, tg, num_pages, stage);
if (stage == SMMU_STAGE_1) { if (stage == SMMU_STAGE_1) {
smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, num_pages, ttl); smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, num_pages, ttl);
} else { } else {

2
hw/arm/trace-events
View File

@ -55,7 +55,7 @@ smmuv3_cmdq_tlbi_s12_vmid(int vmid) "vmid=%d"
smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x" smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x"
smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s" smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s" smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s"
smmuv3_inv_notifiers_iova(const char *name, int asid, int vmid, uint64_t iova, uint8_t tg, uint64_t num_pages) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64 smmuv3_inv_notifiers_iova(const char *name, int asid, int vmid, uint64_t iova, uint8_t tg, uint64_t num_pages, int stage) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64" stage=%d"
# strongarm.c # strongarm.c
strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) "%s speed=%d parity=%c data=%d stop=%d" strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) "%s speed=%d parity=%c data=%d stop=%d"