target/arm: Enable TTBCR_EAE for ARMv8-R AArch32

ARMv8-R AArch32 CPUs behave as if TTBCR.EAE is always 1 even
tough they don't have the TTBCR register.
See ARM Architecture Reference Manual Supplement - ARMv8, for the ARMv8-R
AArch32 architecture profile Version:A.c section C1.2.

Signed-off-by: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221206102504.165775-5-tobias.roehmel@rwth-aachen.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Tobias Röhmel 2022-12-06 11:25:01 +01:00 committed by Peter Maydell
parent faa1451e7b
commit 452c67a427
3 changed files with 11 additions and 0 deletions

View File

@ -437,6 +437,9 @@ static uint32_t arm_debug_exception_fsr(CPUARMState *env)
if (target_el == 2 || arm_el_is_aa64(env, target_el)) { if (target_el == 2 || arm_el_is_aa64(env, target_el)) {
using_lpae = true; using_lpae = true;
} else if (arm_feature(env, ARM_FEATURE_PMSA) &&
arm_feature(env, ARM_FEATURE_V8)) {
using_lpae = true;
} else { } else {
if (arm_feature(env, ARM_FEATURE_LPAE) && if (arm_feature(env, ARM_FEATURE_LPAE) &&
(env->cp15.tcr_el[target_el] & TTBCR_EAE)) { (env->cp15.tcr_el[target_el] & TTBCR_EAE)) {

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@ -257,6 +257,10 @@ unsigned int arm_pamax(ARMCPU *cpu);
static inline bool extended_addresses_enabled(CPUARMState *env) static inline bool extended_addresses_enabled(CPUARMState *env)
{ {
uint64_t tcr = env->cp15.tcr_el[arm_is_secure(env) ? 3 : 1]; uint64_t tcr = env->cp15.tcr_el[arm_is_secure(env) ? 3 : 1];
if (arm_feature(env, ARM_FEATURE_PMSA) &&
arm_feature(env, ARM_FEATURE_V8)) {
return true;
}
return arm_el_is_aa64(env, 1) || return arm_el_is_aa64(env, 1) ||
(arm_feature(env, ARM_FEATURE_LPAE) && (tcr & TTBCR_EAE)); (arm_feature(env, ARM_FEATURE_LPAE) && (tcr & TTBCR_EAE));
} }

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@ -19,6 +19,10 @@ bool regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx)
if (el == 2 || arm_el_is_aa64(env, el)) { if (el == 2 || arm_el_is_aa64(env, el)) {
return true; return true;
} }
if (arm_feature(env, ARM_FEATURE_PMSA) &&
arm_feature(env, ARM_FEATURE_V8)) {
return true;
}
if (arm_feature(env, ARM_FEATURE_LPAE) if (arm_feature(env, ARM_FEATURE_LPAE)
&& (regime_tcr(env, mmu_idx) & TTBCR_EAE)) { && (regime_tcr(env, mmu_idx) & TTBCR_EAE)) {
return true; return true;