target/arm: Move FPU/SVE/SME access checks up above ARM_CP_SPECIAL_MASK check
In handle_sys() we don't do the check for whether the register is marked as needing an FPU/SVE/SME access check until after we've handled the special cases covered by ARM_CP_SPECIAL_MASK. This is conceptually the wrong way around, because if for example we happen to implement an FPU-access-checked register as ARM_CP_NOP, we should do the access check first. Move the access checks up so they are with all the other access checks, not sandwiched between the special-case read/write handling and the normal-case read/write handling. This doesn't change behaviour at the moment, because we happen not to define any cpregs with both ARM_CPU_{FPU,SVE,SME} and one of the cases dealt with by ARM_CP_SPECIAL_MASK. Moving this code also means we have the correct place to put the FEAT_NV/FEAT_NV2 access handling, which should come after the access checks and before we try to do any read/write action. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Miguel Luis <miguel.luis@oracle.com>
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@ -2190,6 +2190,14 @@ static void handle_sys(DisasContext *s, bool isread,
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gen_a64_update_pc(s, 0);
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}
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if ((ri->type & ARM_CP_FPU) && !fp_access_check_only(s)) {
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return;
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} else if ((ri->type & ARM_CP_SVE) && !sve_access_check(s)) {
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return;
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} else if ((ri->type & ARM_CP_SME) && !sme_access_check(s)) {
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return;
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}
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/* Handle special cases first */
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switch (ri->type & ARM_CP_SPECIAL_MASK) {
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case 0:
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@ -2268,13 +2276,6 @@ static void handle_sys(DisasContext *s, bool isread,
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default:
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g_assert_not_reached();
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}
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if ((ri->type & ARM_CP_FPU) && !fp_access_check_only(s)) {
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return;
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} else if ((ri->type & ARM_CP_SVE) && !sve_access_check(s)) {
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return;
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} else if ((ri->type & ARM_CP_SME) && !sme_access_check(s)) {
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return;
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}
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if (ri->type & ARM_CP_IO) {
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/* I/O operations must end the TB here (whether read or write) */
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