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Fix FPSCR masking

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Merge remote-tracking branch 'remotes/rth/tags/pull-or1k-20200116' into staging

Fix FPSCR masking

# gpg: Signature made Fri 17 Jan 2020 00:51:41 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-or1k-20200116:
  target/openrisc: Fix FPCSR mask to allow setting DZF

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-01-17 13:09:00 +00:00
commit 43ed232fbf
1 changed files with 1 additions and 1 deletions
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2
target/openrisc/fpu_helper.c
View File

@ -70,7 +70,7 @@ void cpu_set_fpcsr(CPUOpenRISCState *env, uint32_t val)
float_round_down
};
env->fpcsr = val & 0x7ff;
env->fpcsr = val & 0xfff;
set_float_rounding_mode(rm_to_sf[extract32(val, 1, 2)], &env->fp_status);
}