tcg-sparc: Improve tcg_out_movi for sparc64.
Generate sign-extended 32-bit constants with SETHI+XOR. Otherwise tidy the routine to avoid the need for conditional compilation and code duplication with movi_imm32. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -314,22 +314,25 @@ static inline void tcg_out_movi_imm32(TCGContext *s, int ret, uint32_t arg)
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static inline void tcg_out_movi(TCGContext *s, TCGType type,
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int ret, tcg_target_long arg)
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{
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#if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
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if (!check_fit_tl(arg, 32) && (arg & ~0xffffffffULL) != 0) {
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tcg_out_movi_imm32(s, TCG_REG_I4, arg >> 32);
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/* All 32-bit constants, as well as 64-bit constants with
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no high bits set go through movi_imm32. */
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if (TCG_TARGET_REG_BITS == 32
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|| type == TCG_TYPE_I32
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|| (arg & ~(tcg_target_long)0xffffffff) == 0) {
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tcg_out_movi_imm32(s, ret, arg);
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} else if (check_fit_tl(arg, 13)) {
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/* A 13-bit constant sign-extended to 64-bits. */
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tcg_out_movi_imm13(s, ret, arg);
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} else if (check_fit_tl(arg, 32)) {
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/* A 32-bit constant sign-extended to 64-bits. */
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tcg_out_sethi(s, ret, ~arg);
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tcg_out_arithi(s, ret, ret, (arg & 0x3ff) | -0x400, ARITH_XOR);
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} else {
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tcg_out_movi_imm32(s, TCG_REG_I4, arg >> (TCG_TARGET_REG_BITS / 2));
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tcg_out_arithi(s, TCG_REG_I4, TCG_REG_I4, 32, SHIFT_SLLX);
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tcg_out_movi_imm32(s, ret, arg);
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tcg_out_arith(s, ret, ret, TCG_REG_I4, ARITH_OR);
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} else if (check_fit_tl(arg, 12))
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tcg_out_movi_imm13(s, ret, arg);
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else {
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tcg_out_sethi(s, ret, arg);
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if (arg & 0x3ff)
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tcg_out_arithi(s, ret, ret, arg & 0x3ff, ARITH_OR);
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}
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#else
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tcg_out_movi_imm32(s, ret, arg);
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#endif
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}
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static inline void tcg_out_ld_raw(TCGContext *s, int ret,
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