From 42fe404458731c0cf753a8d6d34d7116c08e79f7 Mon Sep 17 00:00:00 2001
From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Mon, 22 May 2006 22:05:04 +0000
Subject: [PATCH] dump all mips insn (Thiemo Seufer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1935 c046a42c-6fe2-441c-8c8c-71466251a162
---
 mips-dis.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/mips-dis.c b/mips-dis.c
index f6128955ca..2e7dc85d1d 100644
--- a/mips-dis.c
+++ b/mips-dis.c
@@ -528,6 +528,7 @@ struct mips_opcode
    ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to
    test, or zero if no CPU specific ISA test is desired.  */
 
+#if 0
 #define OPCODE_IS_MEMBER(insn, isa, cpu)				\
     (((insn)->membership & isa) != 0					\
      || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0)	\
@@ -543,6 +544,10 @@ struct mips_opcode
      || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0)	\
      || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0)	\
      || 0)	/* Please keep this term for easier source merging.  */
+#else
+#define OPCODE_IS_MEMBER(insn, isa, cpu)                               \
+    (1 != 0)
+#endif
 
 /* This is a list of macro expanded instructions.