Gravis Ultrasound GF1 sound card emulation (malc).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3921 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog 2008-01-14 22:09:11 +00:00
parent a8981ddad8
commit 423d65f4f9
8 changed files with 1345 additions and 2 deletions

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@ -421,6 +421,9 @@ endif
ifdef CONFIG_ADLIB ifdef CONFIG_ADLIB
SOUND_HW += fmopl.o adlib.o SOUND_HW += fmopl.o adlib.o
endif endif
ifdef CONFIG_GUS
SOUND_HW += gus.o gusemu_hal.o gusemu_mixer.o
endif
ifdef CONFIG_VNC_TLS ifdef CONFIG_VNC_TLS
CPPFLAGS += $(CONFIG_VNC_TLS_CFLAGS) CPPFLAGS += $(CONFIG_VNC_TLS_CFLAGS)

9
configure vendored
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@ -86,6 +86,7 @@ gdbstub="yes"
slirp="yes" slirp="yes"
adlib="no" adlib="no"
ac97="no" ac97="no"
gus="no"
oss="no" oss="no"
dsound="no" dsound="no"
coreaudio="no" coreaudio="no"
@ -283,6 +284,8 @@ for opt do
;; ;;
--enable-ac97) ac97="yes" --enable-ac97) ac97="yes"
;; ;;
--enable-gus) gus="yes"
;;
--disable-kqemu) kqemu="no" --disable-kqemu) kqemu="no"
;; ;;
--enable-profiler) profiler="yes" --enable-profiler) profiler="yes"
@ -410,6 +413,7 @@ echo " --enable-cocoa enable COCOA (Mac OS X only)"
echo " --enable-mingw32 enable Win32 cross compilation with mingw32" echo " --enable-mingw32 enable Win32 cross compilation with mingw32"
echo " --enable-adlib enable Adlib emulation" echo " --enable-adlib enable Adlib emulation"
echo " --enable-ac97 enable AC97 emulation" echo " --enable-ac97 enable AC97 emulation"
echo " --enable-gus enable Gravis Ultrasound emulation"
echo " --enable-coreaudio enable Coreaudio audio driver" echo " --enable-coreaudio enable Coreaudio audio driver"
echo " --enable-alsa enable ALSA audio driver" echo " --enable-alsa enable ALSA audio driver"
echo " --enable-esd enable EsoundD audio driver" echo " --enable-esd enable EsoundD audio driver"
@ -724,6 +728,7 @@ fi
echo "mingw32 support $mingw32" echo "mingw32 support $mingw32"
echo "Adlib support $adlib" echo "Adlib support $adlib"
echo "AC97 support $ac97" echo "AC97 support $ac97"
echo "GUS support $gus"
echo "CoreAudio support $coreaudio" echo "CoreAudio support $coreaudio"
echo "ALSA support $alsa" echo "ALSA support $alsa"
echo "EsounD support $esd" echo "EsounD support $esd"
@ -904,6 +909,10 @@ if test "$ac97" = "yes" ; then
echo "CONFIG_AC97=yes" >> $config_mak echo "CONFIG_AC97=yes" >> $config_mak
echo "#define CONFIG_AC97 1" >> $config_h echo "#define CONFIG_AC97 1" >> $config_h
fi fi
if test "$gus" = "yes" ; then
echo "CONFIG_GUS=yes" >> $config_mak
echo "#define CONFIG_GUS 1" >> $config_h
fi
if test "$oss" = "yes" ; then if test "$oss" = "yes" ; then
echo "CONFIG_OSS=yes" >> $config_mak echo "CONFIG_OSS=yes" >> $config_mak
echo "#define CONFIG_OSS 1" >> $config_h echo "#define CONFIG_OSS 1" >> $config_h

300
hw/gus.c Normal file
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@ -0,0 +1,300 @@
/*
* QEMU Proxy for Gravis Ultrasound GF1 emulation by Tibor "TS" Schütz
*
* Copyright (c) 2002-2005 Vassili Karpov (malc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "hw.h"
#include "audiodev.h"
#include "audio/audio.h"
#include "isa.h"
#include "gusemu.h"
#include "gustate.h"
#define dolog(...) AUD_log ("audio", __VA_ARGS__)
#ifdef DEBUG
#define ldebug(...) dolog (__VA_ARGS__)
#else
#define ldebug(...)
#endif
#ifdef WORDS_BIGENDIAN
#define GUS_ENDIANNESS 1
#else
#define GUS_ENDIANNESS 0
#endif
#define IO_READ_PROTO(name) \
uint32_t name (void *opaque, uint32_t nport)
#define IO_WRITE_PROTO(name) \
void name (void *opaque, uint32_t nport, uint32_t val)
static struct {
int port;
int irq;
int dma;
int freq;
} conf = {0x240, 7, 3, 44100};
typedef struct GUSState {
GUSEmuState emu;
QEMUSoundCard card;
int freq;
int pos, left, shift, irqs;
uint16_t *mixbuf;
uint8_t himem[1024 * 1024 + 32 + 4096];
int samples;
SWVoiceOut *voice;
int64_t last_ticks;
qemu_irq *pic;
} GUSState;
IO_READ_PROTO (gus_readb)
{
GUSState *s = opaque;
return gus_read (&s->emu, nport, 1);
}
IO_READ_PROTO (gus_readw)
{
GUSState *s = opaque;
return gus_read (&s->emu, nport, 2);
}
IO_WRITE_PROTO (gus_writeb)
{
GUSState *s = opaque;
gus_write (&s->emu, nport, 1, val);
}
IO_WRITE_PROTO (gus_writew)
{
GUSState *s = opaque;
gus_write (&s->emu, nport, 2, val);
}
static int write_audio (GUSState *s, int samples)
{
int net = 0;
int pos = s->pos;
while (samples) {
int nbytes, wbytes, wsampl;
nbytes = samples << s->shift;
wbytes = AUD_write (
s->voice,
s->mixbuf + (pos << (s->shift - 1)),
nbytes
);
if (wbytes) {
wsampl = wbytes >> s->shift;
samples -= wsampl;
pos = (pos + wsampl) % s->samples;
net += wsampl;
}
else {
break;
}
}
return net;
}
static void GUS_callback (void *opaque, int free)
{
int samples, to_play, net = 0;
GUSState *s = opaque;
samples = free >> s->shift;
to_play = audio_MIN (samples, s->left);
while (to_play) {
int written = write_audio (s, to_play);
if (!written) {
goto reset;
}
s->left -= written;
to_play -= written;
samples -= written;
net += written;
}
samples = audio_MIN (samples, s->samples);
if (samples) {
gus_mixvoices (&s->emu, s->freq, samples, s->mixbuf);
while (samples) {
int written = write_audio (s, samples);
if (!written) {
break;
}
samples -= written;
net += written;
}
}
s->left = samples;
reset:
gus_irqgen (&s->emu, (double) (net * 1000000) / s->freq);
}
int GUS_irqrequest (GUSEmuState *emu, int hwirq, int n)
{
GUSState *s = emu->opaque;
/* qemu_irq_lower (s->pic[hwirq]); */
qemu_irq_raise (s->pic[hwirq]);
s->irqs += n;
ldebug ("irqrequest %d %d %d\n", hwirq, n, s->irqs);
return n;
}
void GUS_irqclear (GUSEmuState *emu, int hwirq)
{
GUSState *s = emu->opaque;
ldebug ("irqclear %d %d\n", hwirq, s->irqs);
qemu_irq_lower (s->pic[hwirq]);
s->irqs -= 1;
#ifdef IRQ_STORM
if (s->irqs > 0) {
qemu_irq_raise (s->pic[hwirq]);
}
#endif
}
void GUS_dmarequest (GUSEmuState *der)
{
/* GUSState *s = (GUSState *) der; */
ldebug ("dma request %d\n", der->gusdma);
DMA_hold_DREQ (der->gusdma);
}
int GUS_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
{
GUSState *s = opaque;
int8_t tmpbuf[4096];
int pos = dma_pos, mode, left = dma_len - dma_pos;
ldebug ("read DMA %#x %d\n", dma_pos, dma_len);
mode = DMA_get_channel_mode (s->emu.gusdma);
while (left) {
int to_copy = audio_MIN ((size_t) left, sizeof (tmpbuf));
int copied;
ldebug ("left=%d to_copy=%d pos=%d\n", left, to_copy, pos);
copied = DMA_read_memory (nchan, tmpbuf, pos, to_copy);
gus_dma_transferdata (&s->emu, tmpbuf, copied, left == copied);
left -= copied;
pos += copied;
}
if (0 == ((mode >> 4) & 1)) {
DMA_release_DREQ (s->emu.gusdma);
}
return dma_len;
}
int GUS_init (AudioState *audio, qemu_irq *pic)
{
GUSState *s;
audsettings_t as;
if (!audio) {
dolog ("No audio state\n");
return -1;
}
s = qemu_mallocz (sizeof (*s));
if (!s) {
dolog ("Could not allocate memory for GUS (%zu bytes)\n",
sizeof (*s));
return -1;
}
AUD_register_card (audio, "gus", &s->card);
as.freq = conf.freq;
as.nchannels = 2;
as.fmt = AUD_FMT_S16;
as.endianness = GUS_ENDIANNESS;
s->voice = AUD_open_out (
&s->card,
NULL,
"gus",
s,
GUS_callback,
&as
);
if (!s->voice) {
AUD_remove_card (&s->card);
qemu_free (s);
return -1;
}
s->shift = 2;
s->samples = AUD_get_buffer_size_out (s->voice) >> s->shift;
s->mixbuf = qemu_mallocz (s->samples << s->shift);
if (!s->mixbuf) {
AUD_close_out (&s->card, s->voice);
AUD_remove_card (&s->card);
qemu_free (s);
return -1;
}
register_ioport_write (conf.port, 1, 1, gus_writeb, s);
register_ioport_write (conf.port, 1, 2, gus_writew, s);
register_ioport_read ((conf.port + 0x100) & 0xf00, 1, 1, gus_readb, s);
register_ioport_read ((conf.port + 0x100) & 0xf00, 1, 2, gus_readw, s);
register_ioport_write (conf.port + 6, 10, 1, gus_writeb, s);
register_ioport_write (conf.port + 6, 10, 2, gus_writew, s);
register_ioport_read (conf.port + 6, 10, 1, gus_readb, s);
register_ioport_read (conf.port + 6, 10, 2, gus_readw, s);
register_ioport_write (conf.port + 0x100, 8, 1, gus_writeb, s);
register_ioport_write (conf.port + 0x100, 8, 2, gus_writew, s);
register_ioport_read (conf.port + 0x100, 8, 1, gus_readb, s);
register_ioport_read (conf.port + 0x100, 8, 2, gus_readw, s);
DMA_register_channel (conf.dma, GUS_read_DMA, s);
s->emu.gusirq = conf.irq;
s->emu.gusdma = conf.dma;
s->emu.himemaddr = s->himem;
s->emu.gusdatapos = s->emu.himemaddr + 1024 * 1024 + 32;
s->emu.opaque = s;
s->freq = conf.freq;
s->pic = pic;
AUD_set_active_out (s->voice, 1);
return 0;
}

103
hw/gusemu.h Normal file
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@ -0,0 +1,103 @@
/*
* GUSEMU32 - API
*
* Copyright (C) 2000-2007 Tibor "TS" Schütz
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef GUSEMU_H
#define GUSEMU_H
/* data types (need to be adjusted if neither a VC6 nor a C99 compatible compiler is used) */
#if defined _WIN32 && defined _MSC_VER /* doesnt support other win32 compilers yet, do it yourself... */
typedef unsigned char GUSbyte;
typedef unsigned short GUSword;
typedef unsigned int GUSdword;
typedef signed char GUSchar;
#else
#include <stdint.h>
typedef int8_t GUSchar;
typedef uint8_t GUSbyte;
typedef uint16_t GUSword;
typedef uint32_t GUSdword;
#endif
typedef struct _GUSEmuState
{
GUSbyte *himemaddr; /* 1024*1024 bytes used for storing uploaded samples (+32 additional bytes for read padding) */
GUSbyte *gusdatapos; /* (gusdataend-gusdata) bytes used for storing emulated GF1/mixer register states (32*32+4 bytes in initial GUSemu32 version) */
int gusirq;
int gusdma;
unsigned int timer1fraction;
unsigned int timer2fraction;
void *opaque;
} GUSEmuState;
/* ** Callback functions needed: */
/* NMI is defined as hwirq=-1 (not supported (yet?)) */
/* GUS_irqrequest returns the number of IRQs actually scheduled into the virtual machine */
/* Level triggered IRQ simulations normally return 1 */
/* Event triggered IRQ simulation can safely ignore GUS_irqclear calls */
int GUS_irqrequest(GUSEmuState *state, int hwirq, int num);/* needed in both mixer and bus emulation functions. */
void GUS_irqclear( GUSEmuState *state, int hwirq); /* used by gus_write() only - can be left empty for mixer functions */
void GUS_dmarequest(GUSEmuState *state); /* used by gus_write() only - can be left empty for mixer functions */
/* ** ISA bus interface functions: */
/* Port I/O handlers */
/* support the following ports: */
/* 2x0,2x6,2x8...2xF,3x0...3x7; */
/* optional: 388,389 (at least writes should be forwarded or some GUS detection algorithms will fail) */
/* data is passed in host byte order */
unsigned int gus_read( GUSEmuState *state, int port, int size);
void gus_write(GUSEmuState *state, int port, int size, unsigned int data);
/* size is given in bytes (1 for byte, 2 for word) */
/* DMA data transfer function */
/* data pointed to is passed in native x86 order */
void gus_dma_transferdata(GUSEmuState *state, char *dma_addr, unsigned int count, int TC);
/* Called back by GUS_start_DMA as soon as the emulated DMA controller is ready for a transfer to or from GUS */
/* (might be immediately if the DMA controller was programmed first) */
/* dma_addr is an already translated address directly pointing to the beginning of the memory block */
/* do not forget to update DMA states after the call, including the DREQ and TC flags */
/* it is possible to break down a single transfer into multiple ones, but take care that: */
/* -dma_count is actually count-1 */
/* -before and during a transfer, DREQ is set and TC cleared */
/* -when calling gus_dma_transferdata(), TC is only set true for call transfering the last byte */
/* -after the last transfer, DREQ is cleared and TC is set */
/* ** GF1 mixer emulation functions: */
/* Usually, gus_irqgen should be called directly after gus_mixvoices if you can meet the recommended ranges. */
/* If the interrupts are executed immediately (i.e., are synchronous), it may be useful to break this */
/* down into a sequence of gus_mixvoice();gus_irqgen(); calls while mixing an audio block. */
/* If the interrupts are asynchronous, it may be needed to use a separate thread mixing into a temporary */
/* audio buffer in order to avoid quality loss caused by large numsamples and elapsed_time values. */
void gus_mixvoices(GUSEmuState *state, unsigned int playback_freq, unsigned int numsamples, short *bufferpos);
/* recommended range: 10 < numsamples < 100 */
/* lower values may result in increased rounding error, higher values often cause audible timing delays */
void gus_irqgen(GUSEmuState *state, unsigned int elapsed_time);
/* recommended range: 80us < elapsed_time < max(1000us, numsamples/playback_freq) */
/* lower values won´t provide any benefit at all, higher values can cause audible timing delays */
/* note: masked timers are also calculated by this function, thus it might be needed even without any IRQs in use! */
#endif /* gusemu.h */

554
hw/gusemu_hal.c Normal file
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@ -0,0 +1,554 @@
/*
* GUSEMU32 - bus interface part
*
* Copyright (C) 2000-2007 Tibor "TS" Schütz
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/*
* TODO: check mixer: see 7.20 of sdk for panning pos (applies to all gus models?)?
*/
#include "gustate.h"
#include "gusemu.h"
#define GUSregb(position) (* (gusptr+(position)))
#define GUSregw(position) (*(GUSword *) (gusptr+(position)))
#define GUSregd(position) (*(GUSdword *)(gusptr+(position)))
/* size given in bytes */
unsigned int gus_read(GUSEmuState * state, int port, int size)
{
int value_read = 0;
GUSbyte *gusptr;
gusptr = state->gusdatapos;
GUSregd(portaccesses)++;
switch (port & 0xff0f)
{
/* MixerCtrlReg (read not supported on GUS classic) */
/* case 0x200: return GUSregb(MixerCtrlReg2x0); */
case 0x206: /* IRQstatReg / SB2x6IRQ */
/* adlib/sb bits set in port handlers */
/* timer/voice bits set in gus_irqgen() */
/* dma bit set in gus_dma_transferdata */
/* midi not implemented yet */
return GUSregb(IRQStatReg2x6);
/* case 0x308: */ /* AdLib388 */
case 0x208:
if (GUSregb(GUS45TimerCtrl) & 1)
return GUSregb(TimerStatus2x8);
return GUSregb(AdLibStatus2x8); /* AdLibStatus */
case 0x309: /* AdLib389 */
case 0x209:
return GUSregb(AdLibData2x9); /* AdLibData */
case 0x20A:
return GUSregb(AdLibCommand2xA); /* AdLib2x8_2xA */
#if 0
case 0x20B: /* GUS hidden registers (read not supported on GUS classic) */
switch (GUSregb(RegCtrl_2xF) & 0x07)
{
case 0: /* IRQ/DMA select */
if (GUSregb(MixerCtrlReg2x0) & 0x40)
return GUSregb(IRQ_2xB); /* control register select bit */
else
return GUSregb(DMA_2xB);
/* case 1-5: */ /* general purpose emulation regs */
/* return ... */ /* + status reset reg (write only) */
case 6:
return GUSregb(Jumper_2xB); /* Joystick/MIDI enable (JumperReg) */
default:;
}
break;
#endif
case 0x20C: /* SB2xCd */
value_read = GUSregb(SB2xCd);
if (GUSregb(StatRead_2xF) & 0x20)
GUSregb(SB2xCd) ^= 0x80; /* toggle MSB on read */
return value_read;
/* case 0x20D: */ /* SB2xD is write only -> 2xE writes to it*/
case 0x20E:
if (GUSregb(RegCtrl_2xF) & 0x80) /* 2xE read IRQ enabled? */
{
GUSregb(StatRead_2xF) |= 0x80;
GUS_irqrequest(state, state->gusirq, 1);
}
return GUSregb(SB2xE); /* SB2xE */
case 0x20F: /* StatRead_2xF */
/*set/clear fixed bits */
/*value_read = (GUSregb(StatRead_2xF) & 0xf9)|1; */ /*(LSB not set on GUS classic!)*/
value_read = (GUSregb(StatRead_2xF) & 0xf9);
if (GUSregb(MixerCtrlReg2x0) & 0x08)
value_read |= 2; /* DMA/IRQ enabled flag */
return value_read;
/* case 0x300: */ /* MIDI (not implemented) */
/* case 0x301: */ /* MIDI (not implemented) */
case 0x302:
return GUSregb(VoiceSelReg3x2); /* VoiceSelReg */
case 0x303:
return GUSregb(FunkSelReg3x3); /* FunkSelReg */
case 0x304: /* DataRegLoByte3x4 + DataRegWord3x4 */
case 0x305: /* DataRegHiByte3x5 */
switch (GUSregb(FunkSelReg3x3))
{
/* common functions */
case 0x41: /* DramDMAContrReg */
value_read = GUSregb(GUS41DMACtrl); /* &0xfb */
GUSregb(GUS41DMACtrl) &= 0xbb;
if (state->gusdma >= 4)
value_read |= 0x04;
if (GUSregb(IRQStatReg2x6) & 0x80)
{
value_read |= 0x40;
GUSregb(IRQStatReg2x6) &= 0x7f;
if (!GUSregb(IRQStatReg2x6))
GUS_irqclear(state, state->gusirq);
}
return (GUSbyte) value_read;
/* DramDMAmemPosReg */
/* case 0x42: value_read=GUSregw(GUS42DMAStart); break;*/
/* 43h+44h write only */
case 0x45:
return GUSregb(GUS45TimerCtrl); /* TimerCtrlReg */
/* 46h+47h write only */
/* 48h: samp freq - write only */
case 0x49:
return GUSregb(GUS49SampCtrl) & 0xbf; /* SampCtrlReg */
/* case 4bh: */ /* joystick trim not supported */
/* case 0x4c: return GUSregb(GUS4cReset); */ /* GUSreset: write only*/
/* voice specific functions */
case 0x80:
case 0x81:
case 0x82:
case 0x83:
case 0x84:
case 0x85:
case 0x86:
case 0x87:
case 0x88:
case 0x89:
case 0x8a:
case 0x8b:
case 0x8c:
case 0x8d:
{
int offset = 2 * (GUSregb(FunkSelReg3x3) & 0x0f);
offset += ((int) GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = Voice*32 + Funktion*2 */
value_read = GUSregw(offset);
}
break;
/* voice unspecific functions */
case 0x8e: /* NumVoice */
return GUSregb(NumVoices);
case 0x8f: /* irqstatreg */
/* (pseudo IRQ-FIFO is processed during a gus_write(0x3X3,0x8f)) */
return GUSregb(SynVoiceIRQ8f);
default:
return 0xffff;
}
if (size == 1)
{
if ((port & 0xff0f) == 0x305)
value_read = value_read >> 8;
value_read &= 0xff;
}
return (GUSword) value_read;
/* case 0x306: */ /* Mixer/Version info */
/* return 0xff; */ /* Pre 3.6 boards, ICS mixer NOT present */
case 0x307: /* DRAMaccess */
{
GUSbyte *adr;
adr = state->himemaddr + (GUSregd(GUSDRAMPOS24bit) & 0xfffff);
return *adr;
}
default:;
}
return 0xffff;
}
void gus_write(GUSEmuState * state, int port, int size, unsigned int data)
{
GUSbyte *gusptr;
gusptr = state->gusdatapos;
GUSregd(portaccesses)++;
switch (port & 0xff0f)
{
case 0x200: /* MixerCtrlReg */
GUSregb(MixerCtrlReg2x0) = (GUSbyte) data;
break;
case 0x206: /* IRQstatReg / SB2x6IRQ */
if (GUSregb(GUS45TimerCtrl) & 0x20) /* SB IRQ enabled? -> set 2x6IRQ bit */
{
GUSregb(TimerStatus2x8) |= 0x08;
GUSregb(IRQStatReg2x6) = 0x10;
GUS_irqrequest(state, state->gusirq, 1);
}
break;
case 0x308: /* AdLib 388h */
case 0x208: /* AdLibCommandReg */
GUSregb(AdLibCommand2xA) = (GUSbyte) data;
break;
case 0x309: /* AdLib 389h */
case 0x209: /* AdLibDataReg */
if ((GUSregb(AdLibCommand2xA) == 0x04) && (!(GUSregb(GUS45TimerCtrl) & 1))) /* GUS auto timer mode enabled? */
{
if (data & 0x80)
GUSregb(TimerStatus2x8) &= 0x1f; /* AdLib IRQ reset? -> clear maskable adl. timer int regs */
else
GUSregb(TimerDataReg2x9) = (GUSbyte) data;
}
else
{
GUSregb(AdLibData2x9) = (GUSbyte) data;
if (GUSregb(GUS45TimerCtrl) & 0x02)
{
GUSregb(TimerStatus2x8) |= 0x01;
GUSregb(IRQStatReg2x6) = 0x10;
GUS_irqrequest(state, state->gusirq, 1);
}
}
break;
case 0x20A:
GUSregb(AdLibStatus2x8) = (GUSbyte) data;
break; /* AdLibStatus2x8 */
case 0x20B: /* GUS hidden registers */
switch (GUSregb(RegCtrl_2xF) & 0x7)
{
case 0:
if (GUSregb(MixerCtrlReg2x0) & 0x40)
GUSregb(IRQ_2xB) = (GUSbyte) data; /* control register select bit */
else
GUSregb(DMA_2xB) = (GUSbyte) data;
break;
/* case 1-4: general purpose emulation regs */
case 5: /* clear stat reg 2xF */
GUSregb(StatRead_2xF) = 0; /* ToDo: is this identical with GUS classic? */
if (!GUSregb(IRQStatReg2x6))
GUS_irqclear(state, state->gusirq);
break;
case 6: /* Jumper reg (Joystick/MIDI enable) */
GUSregb(Jumper_2xB) = (GUSbyte) data;
break;
default:;
}
break;
case 0x20C: /* SB2xCd */
if (GUSregb(GUS45TimerCtrl) & 0x20)
{
GUSregb(TimerStatus2x8) |= 0x10; /* SB IRQ enabled? -> set 2xCIRQ bit */
GUSregb(IRQStatReg2x6) = 0x10;
GUS_irqrequest(state, state->gusirq, 1);
}
case 0x20D: /* SB2xCd no IRQ */
GUSregb(SB2xCd) = (GUSbyte) data;
break;
case 0x20E: /* SB2xE */
GUSregb(SB2xE) = (GUSbyte) data;
break;
case 0x20F:
GUSregb(RegCtrl_2xF) = (GUSbyte) data;
break; /* CtrlReg2xF */
case 0x302: /* VoiceSelReg */
GUSregb(VoiceSelReg3x2) = (GUSbyte) data;
break;
case 0x303: /* FunkSelReg */
GUSregb(FunkSelReg3x3) = (GUSbyte) data;
if ((GUSbyte) data == 0x8f) /* set irqstatreg, get voicereg and clear IRQ */
{
int voice;
if (GUSregd(voicewavetableirq)) /* WavetableIRQ */
{
for (voice = 0; voice < 31; voice++)
{
if (GUSregd(voicewavetableirq) & (1 << voice))
{
GUSregd(voicewavetableirq) ^= (1 << voice); /* clear IRQ bit */
GUSregb(voice << 5) &= 0x7f; /* clear voice reg irq bit */
if (!GUSregd(voicewavetableirq))
GUSregb(IRQStatReg2x6) &= 0xdf;
if (!GUSregb(IRQStatReg2x6))
GUS_irqclear(state, state->gusirq);
GUSregb(SynVoiceIRQ8f) = voice | 0x60; /* (bit==0 => IRQ wartend) */
return;
}
}
}
else if (GUSregd(voicevolrampirq)) /* VolRamp IRQ */
{
for (voice = 0; voice < 31; voice++)
{
if (GUSregd(voicevolrampirq) & (1 << voice))
{
GUSregd(voicevolrampirq) ^= (1 << voice); /* clear IRQ bit */
GUSregb((voice << 5) + VSRVolRampControl) &= 0x7f; /* clear voice volume reg irq bit */
if (!GUSregd(voicevolrampirq))
GUSregb(IRQStatReg2x6) &= 0xbf;
if (!GUSregb(IRQStatReg2x6))
GUS_irqclear(state, state->gusirq);
GUSregb(SynVoiceIRQ8f) = voice | 0x80; /* (bit==0 => IRQ wartend) */
return;
}
}
}
GUSregb(SynVoiceIRQ8f) = 0xe8; /* kein IRQ wartet */
}
break;
case 0x304:
case 0x305:
{
GUSword writedata = (GUSword) data;
GUSword readmask = 0x0000;
if (size == 1)
{
readmask = 0xff00;
writedata &= 0xff;
if ((port & 0xff0f) == 0x305)
{
writedata = (GUSword) (writedata << 8);
readmask = 0x00ff;
}
}
switch (GUSregb(FunkSelReg3x3))
{
/* voice specific functions */
case 0x00:
case 0x01:
case 0x02:
case 0x03:
case 0x04:
case 0x05:
case 0x06:
case 0x07:
case 0x08:
case 0x09:
case 0x0a:
case 0x0b:
case 0x0c:
case 0x0d:
{
int offset;
if (!(GUSregb(GUS4cReset) & 0x01))
break; /* reset flag active? */
offset = 2 * (GUSregb(FunkSelReg3x3) & 0x0f);
offset += (GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = Voice*32 + Funktion*2 */
GUSregw(offset) = (GUSword) ((GUSregw(offset) & readmask) | writedata);
}
break;
/* voice unspecific functions */
case 0x0e: /* NumVoices */
GUSregb(NumVoices) = (GUSbyte) data;
break;
/* case 0x0f: */ /* read only */
/* common functions */
case 0x41: /* DramDMAContrReg */
GUSregb(GUS41DMACtrl) = (GUSbyte) data;
if (data & 0x01)
GUS_dmarequest(state);
break;
case 0x42: /* DramDMAmemPosReg */
GUSregw(GUS42DMAStart) = (GUSregw(GUS42DMAStart) & readmask) | writedata;
GUSregb(GUS50DMAHigh) &= 0xf; /* compatibility stuff... */
break;
case 0x43: /* DRAMaddrLo */
GUSregd(GUSDRAMPOS24bit) =
(GUSregd(GUSDRAMPOS24bit) & (readmask | 0xff0000)) | writedata;
break;
case 0x44: /* DRAMaddrHi */
GUSregd(GUSDRAMPOS24bit) =
(GUSregd(GUSDRAMPOS24bit) & 0xffff) | ((data & 0x0f) << 16);
break;
case 0x45: /* TCtrlReg */
GUSregb(GUS45TimerCtrl) = (GUSbyte) data;
if (!(data & 0x20))
GUSregb(TimerStatus2x8) &= 0xe7; /* sb IRQ dis? -> clear 2x8/2xC sb IRQ flags */
if (!(data & 0x02))
GUSregb(TimerStatus2x8) &= 0xfe; /* adlib data IRQ dis? -> clear 2x8 adlib IRQ flag */
if (!(GUSregb(TimerStatus2x8) & 0x19))
GUSregb(IRQStatReg2x6) &= 0xef; /* 0xe6; $$clear IRQ if both IRQ bits are inactive or cleared */
/* catch up delayed timer IRQs: */
if ((GUSregw(TimerIRQs) > 1) && (GUSregb(TimerDataReg2x9) & 3))
{
if (GUSregb(TimerDataReg2x9) & 1) /* start timer 1 (80us decrement rate) */
{
if (!(GUSregb(TimerDataReg2x9) & 0x40))
GUSregb(TimerStatus2x8) |= 0xc0; /* maskable bits */
if (data & 4) /* timer1 irq enable */
{
GUSregb(TimerStatus2x8) |= 4; /* nonmaskable bit */
GUSregb(IRQStatReg2x6) |= 4; /* timer 1 irq pending */
}
}
if (GUSregb(TimerDataReg2x9) & 2) /* start timer 2 (320us decrement rate) */
{
if (!(GUSregb(TimerDataReg2x9) & 0x20))
GUSregb(TimerStatus2x8) |= 0xa0; /* maskable bits */
if (data & 8) /* timer2 irq enable */
{
GUSregb(TimerStatus2x8) |= 2; /* nonmaskable bit */
GUSregb(IRQStatReg2x6) |= 8; /* timer 2 irq pending */
}
}
GUSregw(TimerIRQs)--;
if (GUSregw(BusyTimerIRQs) > 1)
GUSregw(BusyTimerIRQs)--;
else
GUSregw(BusyTimerIRQs) =
GUS_irqrequest(state, state->gusirq, GUSregw(TimerIRQs));
}
else
GUSregw(TimerIRQs) = 0;
if (!(data & 0x04))
{
GUSregb(TimerStatus2x8) &= 0xfb; /* clear non-maskable timer1 bit */
GUSregb(IRQStatReg2x6) &= 0xfb;
}
if (!(data & 0x08))
{
GUSregb(TimerStatus2x8) &= 0xfd; /* clear non-maskable timer2 bit */
GUSregb(IRQStatReg2x6) &= 0xf7;
}
if (!GUSregb(IRQStatReg2x6))
GUS_irqclear(state, state->gusirq);
break;
case 0x46: /* Counter1 */
GUSregb(GUS46Counter1) = (GUSbyte) data;
break;
case 0x47: /* Counter2 */
GUSregb(GUS47Counter2) = (GUSbyte) data;
break;
/* case 0x48: */ /* sampling freq reg not emulated (same as interwave) */
case 0x49: /* SampCtrlReg */
GUSregb(GUS49SampCtrl) = (GUSbyte) data;
break;
/* case 0x4b: */ /* joystick trim not emulated */
case 0x4c: /* GUSreset */
GUSregb(GUS4cReset) = (GUSbyte) data;
if (!(GUSregb(GUS4cReset) & 1)) /* reset... */
{
GUSregd(voicewavetableirq) = 0;
GUSregd(voicevolrampirq) = 0;
GUSregw(TimerIRQs) = 0;
GUSregw(BusyTimerIRQs) = 0;
GUSregb(NumVoices) = 0xcd;
GUSregb(IRQStatReg2x6) = 0;
GUSregb(TimerStatus2x8) = 0;
GUSregb(AdLibData2x9) = 0;
GUSregb(TimerDataReg2x9) = 0;
GUSregb(GUS41DMACtrl) = 0;
GUSregb(GUS45TimerCtrl) = 0;
GUSregb(GUS49SampCtrl) = 0;
GUSregb(GUS4cReset) &= 0xf9; /* clear IRQ and DAC enable bits */
GUS_irqclear(state, state->gusirq);
}
/* IRQ enable bit checked elsewhere */
/* EnableDAC bit may be used by external callers */
break;
}
}
break;
case 0x307: /* DRAMaccess */
{
GUSbyte *adr;
adr = state->himemaddr + (GUSregd(GUSDRAMPOS24bit) & 0xfffff);
*adr = (GUSbyte) data;
}
break;
}
}
/* Attention when breaking up a single DMA transfer to multiple ones:
* it may lead to multiple terminal count interrupts and broken transfers:
*
* 1. Whenever you transfer a piece of data, the gusemu callback is invoked
* 2. The callback may generate a TC irq (if the register was set up to do so)
* 3. The irq may result in the program using the GUS to reprogram the GUS
*
* Some programs also decide to upload by just checking if TC occurs
* (via interrupt or a cleared GUS dma flag)
* and then start the next transfer, without checking DMA state
*
* Thus: Always make sure to set the TC flag correctly!
*
* Note that the genuine GUS had a granularity of 16 bytes/words for low/high DMA
* while later cards had atomic granularity provided by an additional GUS50DMAHigh register
* GUSemu also uses this register to support byte-granular transfers for better compatibility
* with emulators other than GUSemu32
*/
void gus_dma_transferdata(GUSEmuState * state, char *dma_addr, unsigned int count, int TC)
{
/* this function gets called by the callback function as soon as a DMA transfer is about to start
* dma_addr is a translated address within accessible memory, not the physical one,
* count is (real dma count register)+1
* note that the amount of bytes transfered is fully determined by values in the DMA registers
* do not forget to update DMA states after transferring the entire block:
* DREQ cleared & TC asserted after the _whole_ transfer */
char *srcaddr;
char *destaddr;
char msbmask = 0;
GUSbyte *gusptr;
gusptr = state->gusdatapos;
srcaddr = dma_addr; /* system memory address */
{
int offset = (GUSregw(GUS42DMAStart) << 4) + (GUSregb(GUS50DMAHigh) & 0xf);
if (state->gusdma >= 4)
offset = (offset & 0xc0000) + (2 * (offset & 0x1fff0)); /* 16 bit address translation */
destaddr = (char *) state->himemaddr + offset; /* wavetable RAM adress */
}
GUSregw(GUS42DMAStart) += (GUSword) (count >> 4); /* ToDo: add 16bit GUS page limit? */
GUSregb(GUS50DMAHigh) = (GUSbyte) ((count + GUSregb(GUS50DMAHigh)) & 0xf); /* ToDo: add 16bit GUS page limit? */
if (GUSregb(GUS41DMACtrl) & 0x02) /* direction, 0 := sysram->gusram */
{
char *tmpaddr = destaddr;
destaddr = srcaddr;
srcaddr = tmpaddr;
}
if ((GUSregb(GUS41DMACtrl) & 0x80) && (!(GUSregb(GUS41DMACtrl) & 0x02)))
msbmask = (const char) 0x80; /* invert MSB */
for (; count > 0; count--)
{
if (GUSregb(GUS41DMACtrl) & 0x40)
*(destaddr++) = *(srcaddr++); /* 16 bit lobyte */
else
*(destaddr++) = (msbmask ^ (*(srcaddr++))); /* 8 bit */
if (state->gusdma >= 4)
*(destaddr++) = (msbmask ^ (*(srcaddr++))); /* 16 bit hibyte */
}
if (TC)
{
(GUSregb(GUS41DMACtrl)) &= 0xfe; /* clear DMA request bit */
if (GUSregb(GUS41DMACtrl) & 0x20) /* DMA terminal count IRQ */
{
GUSregb(IRQStatReg2x6) |= 0x80;
GUS_irqrequest(state, state->gusirq, 1);
}
}
}

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/*
* GUSEMU32 - mixing engine (similar to Interwave GF1 compatibility)
*
* Copyright (C) 2000-2007 Tibor "TS" Schütz
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "gusemu.h"
#include "gustate.h"
#define GUSregb(position) (* (gusptr+(position)))
#define GUSregw(position) (*(GUSword *) (gusptr+(position)))
#define GUSregd(position) (*(GUSdword *)(gusptr+(position)))
#define GUSvoice(position) (*(GUSword *)(voiceptr+(position)))
/* samples are always 16bit stereo (4 bytes each, first right then left interleaved) */
void gus_mixvoices(GUSEmuState * state, unsigned int playback_freq, unsigned int numsamples,
short *bufferpos)
{
/* note that byte registers are stored in the upper half of each voice register! */
GUSbyte *gusptr;
int Voice;
GUSword *voiceptr;
unsigned int count;
for (count = 0; count < numsamples * 2; count++)
*(bufferpos + count) = 0; /* clear */
gusptr = state->gusdatapos;
voiceptr = (GUSword *) gusptr;
if (!(GUSregb(GUS4cReset) & 0x01)) /* reset flag active? */
return;
for (Voice = 0; Voice <= (GUSregb(NumVoices) & 31); Voice++)
{
if (GUSvoice(wVSRControl) & 0x200)
GUSvoice(wVSRControl) |= 0x100; /* voice stop request */
if (GUSvoice(wVSRVolRampControl) & 0x200)
GUSvoice(wVSRVolRampControl) |= 0x100; /* Volume ramp stop request */
if (!(GUSvoice(wVSRControl) & GUSvoice(wVSRVolRampControl) & 0x100)) /* neither voice nor volume calculation active - save some time here ;) */
{
unsigned int sample;
unsigned int LoopStart = (GUSvoice(wVSRLoopStartHi) << 16) | GUSvoice(wVSRLoopStartLo); /* 23.9 format */
unsigned int LoopEnd = (GUSvoice(wVSRLoopEndHi) << 16) | GUSvoice(wVSRLoopEndLo); /* 23.9 format */
unsigned int CurrPos = (GUSvoice(wVSRCurrPosHi) << 16) | GUSvoice(wVSRCurrPosLo); /* 23.9 format */
int VoiceIncrement = ((((unsigned long) GUSvoice(wVSRFreq) * 44100) / playback_freq) * (14 >> 1)) /
((GUSregb(NumVoices) & 31) + 1); /* 6.10 increment/frame to 23.9 increment/sample */
int PanningPos = (GUSvoice(wVSRPanning) >> 8) & 0xf;
unsigned int Volume32 = 32 * GUSvoice(wVSRCurrVol); /* 32 times larger than original gus for maintaining precision while ramping */
unsigned int StartVol32 = (GUSvoice(wVSRVolRampStartVol) & 0xff00) * 32;
unsigned int EndVol32 = (GUSvoice(wVSRVolRampEndVol) & 0xff00) * 32;
int VolumeIncrement32 = (32 * 16 * (GUSvoice(wVSRVolRampRate) & 0x3f00) >> 8) >> ((((GUSvoice(wVSRVolRampRate) & 0xc000) >> 8) >> 6) * 3); /* including 1/8/64/512 volume speed divisor */
VolumeIncrement32 = (((VolumeIncrement32 * 44100 / 2) / playback_freq) * 14) / ((GUSregb(NumVoices) & 31) + 1); /* adjust ramping speed to playback speed */
if (GUSvoice(wVSRControl) & 0x4000)
VoiceIncrement = -VoiceIncrement; /* reverse playback */
if (GUSvoice(wVSRVolRampControl) & 0x4000)
VolumeIncrement32 = -VolumeIncrement32; /* reverse ramping */
for (sample = 0; sample < numsamples; sample++)
{
int sample1, sample2, Volume;
if (GUSvoice(wVSRControl) & 0x400) /* 16bit */
{
int offset = ((CurrPos >> 9) & 0xc0000) + (((CurrPos >> 9) & 0x1ffff) << 1);
GUSchar *adr;
adr = (GUSchar *) state->himemaddr + offset;
sample1 = (*adr & 0xff) + (*(adr + 1) * 256);
sample2 = (*(adr + 2) & 0xff) + (*(adr + 2 + 1) * 256);
}
else /* 8bit */
{
int offset = (CurrPos >> 9) & 0xfffff;
GUSchar *adr;
adr = (GUSchar *) state->himemaddr + offset;
sample1 = (*adr) * 256;
sample2 = (*(adr + 1)) * 256;
}
Volume = ((((Volume32 >> (4 + 5)) & 0xff) + 256) << (Volume32 >> ((4 + 8) + 5))) / 512; /* semi-logarithmic volume, +5 due to additional precision */
sample1 = (((sample1 * Volume) >> 16) * (512 - (CurrPos % 512))) / 512;
sample2 = (((sample2 * Volume) >> 16) * (CurrPos % 512)) / 512;
sample1 += sample2;
if (!(GUSvoice(wVSRVolRampControl) & 0x100))
{
Volume32 += VolumeIncrement32;
if ((GUSvoice(wVSRVolRampControl) & 0x4000) ? (Volume32 <= StartVol32) : (Volume32 >= EndVol32)) /* ramp up boundary cross */
{
if (GUSvoice(wVSRVolRampControl) & 0x2000)
GUSvoice(wVSRVolRampControl) |= 0x8000; /* volramp IRQ enabled? -> IRQ wait flag */
if (GUSvoice(wVSRVolRampControl) & 0x800) /* loop enabled */
{
if (GUSvoice(wVSRVolRampControl) & 0x1000) /* bidir. loop */
{
GUSvoice(wVSRVolRampControl) ^= 0x4000; /* toggle dir */
VolumeIncrement32 = -VolumeIncrement32;
}
else
Volume32 = (GUSvoice(wVSRVolRampControl) & 0x4000) ? EndVol32 : StartVol32; /* unidir. loop ramp */
}
else
{
GUSvoice(wVSRVolRampControl) |= 0x100;
Volume32 =
(GUSvoice(wVSRVolRampControl) & 0x4000) ? StartVol32 : EndVol32;
}
}
}
if ((GUSvoice(wVSRVolRampControl) & 0xa000) == 0xa000) /* volramp IRQ set and enabled? */
{
GUSregd(voicevolrampirq) |= 1 << Voice; /* set irq slot */
}
else
{
GUSregd(voicevolrampirq) &= (~(1 << Voice)); /* clear irq slot */
GUSvoice(wVSRVolRampControl) &= 0x7f00;
}
if (!(GUSvoice(wVSRControl) & 0x100))
{
CurrPos += VoiceIncrement;
if ((GUSvoice(wVSRControl) & 0x4000) ? (CurrPos <= LoopStart) : (CurrPos >= LoopEnd)) /* playback boundary cross */
{
if (GUSvoice(wVSRControl) & 0x2000)
GUSvoice(wVSRControl) |= 0x8000; /* voice IRQ enabled -> IRQ wait flag */
if (GUSvoice(wVSRControl) & 0x800) /* loop enabled */
{
if (GUSvoice(wVSRControl) & 0x1000) /* pingpong loop */
{
GUSvoice(wVSRControl) ^= 0x4000; /* toggle dir */
VoiceIncrement = -VoiceIncrement;
}
else
CurrPos = (GUSvoice(wVSRControl) & 0x4000) ? LoopEnd : LoopStart; /* unidir. loop */
}
else if (!(GUSvoice(wVSRVolRampControl) & 0x400))
GUSvoice(wVSRControl) |= 0x100; /* loop disabled, rollover check */
}
}
if ((GUSvoice(wVSRControl) & 0xa000) == 0xa000) /* wavetable IRQ set and enabled? */
{
GUSregd(voicewavetableirq) |= 1 << Voice; /* set irq slot */
}
else
{
GUSregd(voicewavetableirq) &= (~(1 << Voice)); /* clear irq slot */
GUSvoice(wVSRControl) &= 0x7f00;
}
/* mix samples into buffer */
*(bufferpos + 2 * sample) += (short) ((sample1 * PanningPos) >> 4); /* right */
*(bufferpos + 2 * sample + 1) += (short) ((sample1 * (15 - PanningPos)) >> 4); /* left */
}
/* write back voice and volume */
GUSvoice(wVSRCurrVol) = Volume32 / 32;
GUSvoice(wVSRCurrPosHi) = CurrPos >> 16;
GUSvoice(wVSRCurrPosLo) = CurrPos & 0xffff;
}
voiceptr += 16; /* next voice */
}
}
void gus_irqgen(GUSEmuState * state, unsigned int elapsed_time)
/* time given in microseconds */
{
int requestedIRQs = 0;
GUSbyte *gusptr;
gusptr = state->gusdatapos;
if (GUSregb(TimerDataReg2x9) & 1) /* start timer 1 (80us decrement rate) */
{
unsigned int timer1fraction = state->timer1fraction;
int newtimerirqs;
newtimerirqs = (elapsed_time + timer1fraction) / (80 * (256 - GUSregb(GUS46Counter1)));
state->timer1fraction = (elapsed_time + timer1fraction) % (80 * (256 - GUSregb(GUS46Counter1)));
if (newtimerirqs)
{
if (!(GUSregb(TimerDataReg2x9) & 0x40))
GUSregb(TimerStatus2x8) |= 0xc0; /* maskable bits */
if (GUSregb(GUS45TimerCtrl) & 4) /* timer1 irq enable */
{
GUSregb(TimerStatus2x8) |= 4; /* nonmaskable bit */
GUSregb(IRQStatReg2x6) |= 4; /* timer 1 irq pending */
GUSregw(TimerIRQs) += newtimerirqs;
requestedIRQs += newtimerirqs;
}
}
}
if (GUSregb(TimerDataReg2x9) & 2) /* start timer 2 (320us decrement rate) */
{
unsigned int timer2fraction = state->timer2fraction;
int newtimerirqs;
newtimerirqs = (elapsed_time + timer2fraction) / (320 * (256 - GUSregb(GUS47Counter2)));
state->timer2fraction = (elapsed_time + timer2fraction) % (320 * (256 - GUSregb(GUS47Counter2)));
if (newtimerirqs)
{
if (!(GUSregb(TimerDataReg2x9) & 0x20))
GUSregb(TimerStatus2x8) |= 0xa0; /* maskable bits */
if (GUSregb(GUS45TimerCtrl) & 8) /* timer2 irq enable */
{
GUSregb(TimerStatus2x8) |= 2; /* nonmaskable bit */
GUSregb(IRQStatReg2x6) |= 8; /* timer 2 irq pending */
GUSregw(TimerIRQs) += newtimerirqs;
requestedIRQs += newtimerirqs;
}
}
}
if (GUSregb(GUS4cReset) & 0x4) /* synth IRQ enable */
{
if (GUSregd(voicewavetableirq))
GUSregb(IRQStatReg2x6) |= 0x20;
if (GUSregd(voicevolrampirq))
GUSregb(IRQStatReg2x6) |= 0x40;
}
if ((!requestedIRQs) && GUSregb(IRQStatReg2x6))
requestedIRQs++;
if (GUSregb(IRQStatReg2x6))
GUSregw(BusyTimerIRQs) = GUS_irqrequest(state, state->gusirq, requestedIRQs);
}

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/*
* GUSEMU32 - persistent GUS register state
*
* Copyright (C) 2000-2007 Tibor "TS" Schütz
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef GUSTATE_H
#define GUSTATE_H
/*state block offset*/
#define gusdata (0)
/* data stored using this structure is in host byte order! */
/*access type*/
#define PortRead (0)
#define PortWrite (1)
#define Port8Bitacc (0)
#define Port16Bitacc (1)
/*voice register offsets (in bytes)*/
#define VSRegs (0)
#define VSRControl (0)
#define VSRegsEnd (VSRControl+VSRegs + 32*(16*2))
#define VSRFreq (2)
#define VSRLoopStartHi (4)
#define VSRLoopStartLo (6)
#define VSRLoopEndHi (8)
#define VSRLoopEndLo (10)
#define VSRVolRampRate (12)
#define VSRVolRampStartVol (14)
#define VSRVolRampEndVol (16)
#define VSRCurrVol (18)
#define VSRCurrPosHi (20)
#define VSRCurrPosLo (22)
#define VSRPanning (24)
#define VSRVolRampControl (26)
/*voice register offsets (in words)*/
#define wVSRegs (0)
#define wVSRControl (0)
#define wVSRegsEnd (wVSRControl+wVSRegs + 32*(16))
#define wVSRFreq (1)
#define wVSRLoopStartHi (2)
#define wVSRLoopStartLo (3)
#define wVSRLoopEndHi (4)
#define wVSRLoopEndLo (5)
#define wVSRVolRampRate (6)
#define wVSRVolRampStartVol (7)
#define wVSRVolRampEndVol (8)
#define wVSRCurrVol (9)
#define wVSRCurrPosHi (10)
#define wVSRCurrPosLo (11)
#define wVSRPanning (12)
#define wVSRVolRampControl (13)
/*GUS register state block: 32 voices, padding filled with remaining registers*/
#define DataRegLoByte3x4 (VSRVolRampControl+2)
#define DataRegWord3x4 (DataRegLoByte3x4)
#define DataRegHiByte3x5 (VSRVolRampControl+2 +1)
#define DMA_2xB (VSRVolRampControl+2+2)
#define IRQ_2xB (VSRVolRampControl+2+3)
#define RegCtrl_2xF (VSRVolRampControl+2+(16*2))
#define Jumper_2xB (VSRVolRampControl+2+(16*2)+1)
#define GUS42DMAStart (VSRVolRampControl+2+(16*2)+2)
#define GUS43DRAMIOlo (VSRVolRampControl+2+(16*2)*2)
#define GUSDRAMPOS24bit (GUS43DRAMIOlo)
#define GUS44DRAMIOhi (VSRVolRampControl+2+(16*2)*2+2)
#define voicewavetableirq (VSRVolRampControl+2+(16*2)*3) /* voice IRQ pseudoqueue: 1 bit per voice */
#define voicevolrampirq (VSRVolRampControl+2+(16*2)*4) /* voice IRQ pseudoqueue: 1 bit per voice */
#define startvoices (VSRVolRampControl+2+(16*2)*5) /* statistics / optimizations */
#define IRQStatReg2x6 (VSRVolRampControl+2+(16*2)*6)
#define TimerStatus2x8 (VSRVolRampControl+2+(16*2)*6+1)
#define TimerDataReg2x9 (VSRVolRampControl+2+(16*2)*6+2)
#define MixerCtrlReg2x0 (VSRVolRampControl+2+(16*2)*6+3)
#define VoiceSelReg3x2 (VSRVolRampControl+2+(16*2)*7)
#define FunkSelReg3x3 (VSRVolRampControl+2+(16*2)*7+1)
#define AdLibStatus2x8 (VSRVolRampControl+2+(16*2)*7+2)
#define StatRead_2xF (VSRVolRampControl+2+(16*2)*7+3)
#define GUS48SampSpeed (VSRVolRampControl+2+(16*2)*8)
#define GUS41DMACtrl (VSRVolRampControl+2+(16*2)*8+1)
#define GUS45TimerCtrl (VSRVolRampControl+2+(16*2)*8+2)
#define GUS46Counter1 (VSRVolRampControl+2+(16*2)*8+3)
#define GUS47Counter2 (VSRVolRampControl+2+(16*2)*9)
#define GUS49SampCtrl (VSRVolRampControl+2+(16*2)*9+1)
#define GUS4cReset (VSRVolRampControl+2+(16*2)*9+2)
#define NumVoices (VSRVolRampControl+2+(16*2)*9+3)
#define TimerIRQs (VSRVolRampControl+2+(16*2)*10) /* delayed IRQ, statistics */
#define BusyTimerIRQs (VSRVolRampControl+2+(16*2)*10+2) /* delayed IRQ, statistics */
#define AdLibCommand2xA (VSRVolRampControl+2+(16*2)*11)
#define AdLibData2x9 (VSRVolRampControl+2+(16*2)*11+1)
#define SB2xCd (VSRVolRampControl+2+(16*2)*11+2)
#define SB2xE (VSRVolRampControl+2+(16*2)*11+3)
#define SynVoiceIRQ8f (VSRVolRampControl+2+(16*2)*12)
#define GUS50DMAHigh (VSRVolRampControl+2+(16*2)*12+1)
#define portaccesses (VSRegsEnd) /* statistics / suspend mode */
#define gusdataend (VSRegsEnd+4)
#endif /* gustate.h */

View File

@ -175,14 +175,16 @@ PCI UHCI USB controller and a virtual USB hub.
SMP is supported with up to 255 CPUs. SMP is supported with up to 255 CPUs.
Note that adlib and ac97 are only available when QEMU was configured Note that adlib, ac97 and gus are only available when QEMU was configured
with --enable-adlib, --enable-ac97 respectively. with --enable-adlib, --enable-ac97 or --enable-gus respectively.
QEMU uses the PC BIOS from the Bochs project and the Plex86/Bochs LGPL QEMU uses the PC BIOS from the Bochs project and the Plex86/Bochs LGPL
VGA BIOS. VGA BIOS.
QEMU uses YM3812 emulation by Tatsuyuki Satoh. QEMU uses YM3812 emulation by Tatsuyuki Satoh.
QEMU uses GUS emulation(GUSEMU32) by Tibor "TS" Schütz.
@c man end @c man end
@node pcsys_quickstart @node pcsys_quickstart