From 41c05b41e3b3c5b6b167c315d0f25eb355dcc326 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 08:30:00 +0100 Subject: [PATCH] hw/ide/ahci: Rename AHCI PCI function as 'pdev' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We want to access AHCIPCIState::ahci field. In order to keep the code simple (avoiding &ahci->ahci), rename the current 'ahci' variable as 'pdev' Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Message-Id: <20240213081201.78951-4-philmd@linaro.org> --- hw/i386/pc_q35.c | 15 ++++++++------- hw/mips/boston.c | 10 +++++----- 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 76b3b6032b..a89f900c4c 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -134,7 +134,6 @@ static void pc_q35_init(MachineState *machine) GSIState *gsi_state; ISABus *isa_bus; int i; - PCIDevice *ahci; ram_addr_t lowmem; DriveInfo *hd[MAX_SATA_PORTS]; MachineClass *mc = MACHINE_GET_CLASS(machine); @@ -292,16 +291,18 @@ static void pc_q35_init(MachineState *machine) 0xff0104); if (pcms->sata_enabled) { + PCIDevice *pdev; + /* ahci and SATA device, for q35 1 ahci controller is built-in */ - ahci = pci_create_simple_multifunction(host_bus, + pdev = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_SATA1_DEV, ICH9_SATA1_FUNC), "ich9-ahci"); - idebus[0] = qdev_get_child_bus(DEVICE(ahci), "ide.0"); - idebus[1] = qdev_get_child_bus(DEVICE(ahci), "ide.1"); - g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci)); - ide_drive_get(hd, ahci_get_num_ports(ahci)); - ahci_ide_create_devs(ahci, hd); + idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0"); + idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1"); + g_assert(MAX_SATA_PORTS == ahci_get_num_ports(pdev)); + ide_drive_get(hd, ahci_get_num_ports(pdev)); + ahci_ide_create_devs(pdev, hd); } else { idebus[0] = idebus[1] = NULL; } diff --git a/hw/mips/boston.c b/hw/mips/boston.c index cbcefdd693..0ec0b98066 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -677,7 +677,7 @@ static void boston_mach_init(MachineState *machine) MemoryRegion *flash, *ddr_low_alias, *lcd, *platreg; MemoryRegion *sys_mem = get_system_memory(); XilinxPCIEHost *pcie2; - PCIDevice *ahci; + PCIDevice *pdev; DriveInfo *hd[6]; Chardev *chr; int fw_size, fit_err; @@ -769,11 +769,11 @@ static void boston_mach_init(MachineState *machine) qemu_chr_fe_set_handlers(&s->lcd_display, NULL, NULL, boston_lcd_event, NULL, s, NULL, true); - ahci = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus, + pdev = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus, PCI_DEVFN(0, 0), TYPE_ICH9_AHCI); - g_assert(ARRAY_SIZE(hd) == ahci_get_num_ports(ahci)); - ide_drive_get(hd, ahci_get_num_ports(ahci)); - ahci_ide_create_devs(ahci, hd); + g_assert(ARRAY_SIZE(hd) == ahci_get_num_ports(pdev)); + ide_drive_get(hd, ahci_get_num_ports(pdev)); + ahci_ide_create_devs(pdev, hd); if (machine->firmware) { fw_size = load_image_targphys(machine->firmware,